Hard Disk Controller Error Correction via Buffer Integrity

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional storage systems experience communication errors during data transmission between host devices and storage controllers, leading to costly interrupts and inefficiencies in data recovery.

Innovation Solution

An error correction system comprising a direct access module and a buffer control module that generates and inserts data integrity information, such as ECC and CRC, into data streams, allowing for error detection and correction within the storage device, thereby ensuring uninterrupted operation and improved data transmission efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional storage systems use standard I/O bus interfaces for data transmission, then compatibility with host devices is improved, but communication errors occur during data transmission

Engineering Contradiction:
ImprovecompatibilityVSAvoidcommunication error rate
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The system performs preliminary error detection and correction by generating ECC and CRC bytes before data transmission. The buffer control module pre-computes integrity information for data streams, allowing errors to be detected and corrected before they occur during transmission across the I/O bus interface.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The buffer control module acts as an intermediary between the host device and storage device. It receives data from the host, generates error correction codes, stores the data with integrity information in buffer memory, and provides error-checked data to the storage device, thereby mediating the communication and preventing error propagation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If error correction codes are generated for each set of data bytes, then data reliability is improved, but processing time and computational overhead increase

Engineering Contradiction:
Improvedata integrityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The buffer control module generates error correction codes in advance before data is written to storage. By performing ECC and CRC computation beforehand, the system avoids repeated processing during read operations, thus improving reliability without significantly increasing overall processing time.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses the buffer control module to automatically generate and manage error correction information without requiring continuous host intervention. The buffer control module self-manages the ECC/CRC computation and data integrity monitoring, reducing the computational burden on the host system.

Inventive Principle:
Principle #25Self-service

3Reliability

If data integrity information is inserted into data streams, then error detection capability is improved, but data transmission size increases

Engineering Contradiction:
Improveerror detection capabilityVSAvoiddata transmission size
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The system applies error correction codes locally to data streams at the buffer control module level rather than throughout the entire data transmission path. This localized approach ensures error detection capability is improved where needed without unnecessarily increasing the size of all transmitted data.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The buffer control module selectively applies error correction to data streams based on actual needs. By generating ECC and CRC bytes only for data that requires protection, the system achieves sufficient error detection capability without excessive overhead, optimizing the balance between reliability and data size.

Inventive Principle:
Principle #16Partial or excessive action

4Stability of the object's composition

If conventional controllers store data bytes in sets of predetermined length, then data organization is improved, but error recovery efficiency decreases

Engineering Contradiction:
Improvedata organizationVSAvoiderror recovery efficiency
Core Design Contradiction:
Stability of the object's compositionVSProductivity

Solution Approach 1:

The system segments data into smaller units within the buffer control module, processing and protecting individual data words or bytes with their own ECC and CRC information. This fine-grained segmentation allows for more efficient error recovery compared to conventional approaches that handle large predetermined data sets as single units.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The buffer control module prepares error correction information for each data segment in advance, enabling rapid error detection and correction when errors occur. This preliminary preparation of integrity information for individual segments significantly improves error recovery efficiency while maintaining organized data structure.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7945812B1System and method for error correction
Publication Date: 2011.05.17 MARVELL ASIA PTE LTD
  • US7945812B1 patent drawing
  • US7945812B1 patent drawing
  • US7945812B1 patent drawing

AI summary

A hard disk controller includes a direct access module. The direct access module is configured to receive a data stream from a host, the data stream including a plurality of data words to be transferred to a storage device, generate data integrity information based on the plurality of data words, insert the data integrity information into the data stream prior to transmitting the data stream to a buffer memory, and transmit the data stream. A buffer control module is configured to receive the data stream including the data integrity information from the direct access module, and store the data stream in the buffer memory.