Interactive HDL Debugging Tool for Signal Data Merging
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Solution Overview
Problem
Traditional debugging methods for hardware description language design code and test program code are inefficient, as they either require excessive data storage for synchronous simulations or insufficient data for asynchronous test programs, leading to a dilemma in determining the source of errors between design and test code.
Innovation Solution
An interactive debugging tool is used to execute and display signal values from both design and test program codes during an interactive simulation, allowing for concurrent debugging without the need for excessive data storage, by accessing and merging data from simulation results files.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If synchronous simulation dumps signal values once per clock cycle, then design code debugging is effective, but test program debugging is insufficient due to asynchronous variable changes
Solution Approach 1:
The system dynamically switches between synchronous dump mode (for design code debugging) and asynchronous dump mode (for test program debugging). The dump mechanism adapts its behavior based on the debugging needs: using clock-cycle-synchronized dumps when debugging design code, and event-driven dumps when debugging test program variables that change asynchronously.
Solution Approach 2:
The invention changes the dumping parameters based on the debugging target. For design code, it uses fixed interval dumping at clock cycle boundaries. For test program debugging, it changes to event-triggered dumping that captures variable values whenever they change, regardless of clock cycle timing.
2Reliability
If interactive simulation stores information for all variables and signals, then debugging completeness is improved, but simulation speed deteriorates dramatically
Solution Approach 1:
Instead of uniformly dumping all variables and signals, the system applies local quality by selectively dumping only the specific variables and signals relevant to the current debugging context. The dump file contains targeted information based on what is actually needed for diagnosing the particular error, rather than comprehensive data for all possible debugging scenarios.
Solution Approach 2:
The invention uses partial action by dumping only the necessary subset of variable and signal information required for effective debugging. Rather than storing complete state information for all components, it captures partial but sufficient data that enables error identification without the overhead of comprehensive logging.
3Productivity
If dump file format is simplified for speed, then simulation performance is improved, but debugging effectiveness deteriorates due to cumbersome format requirements
Solution Approach 1:
The dump file format is designed to be universal and multi-functional, serving both performance requirements and debugging convenience. The structured format enables efficient storage and retrieval while also being easily parseable by debugging tools, eliminating the need for specialized processing of cumbersome formats.
Data Source
AI summary
Disclosed is a method of debugging a simulation system including design code representing a design of an electronic circuit and test program code configured to exercise the design code. The method includes using an interactive debugging tool to execute an interactive simulation of the test program code and the design code, and, during the interactive simulation, displaying, using the interactive debugging tool, information of a simulation results file storing a plurality of signal values generated by executing the test program code and the design code during a previously executed simulation.