HDL Simulator Indeterminate Value Handling

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional HDL compilers and simulators fail to properly interpret indeterminate values for certain HDL constructs, leading to inconsistencies between RTL and gate level simulations, which can result in false positives or false negatives during error detection, especially during power-up modeling of complex low-power circuits.

Innovation Solution

The system modifies HDL semantics for indeterminate values, allowing it to execute multiple alternatives controlled by an indeterminate expression and merge results appropriately, thereby ensuring consistent simulations across different levels of abstraction without requiring users to rewrite existing HDL code.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional HDL compilers and simulators are used, then existing tools can be used without modification, but inconsistencies between RTL and gate level simulations occur leading to false positives or false negatives

Engineering Contradiction:
Improvesimulation consistencyVSAvoidHDL semantics modification
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the semantic parameters of HDL indeterminate values from conventional interpretation to a new interpretation where indeterminate values in control expressions cause multiple alternatives to be executed and merged. This parameter change in how indeterminate values are handled resolves the inconsistency between RTL and gate level simulations without requiring complete tool redesign

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces an intermediary mechanism that intercepts indeterminate values in HDL constructs and transforms them into a special handling mode. This intermediary layer enables consistent simulation behavior across abstraction levels by mediating between the conventional HDL interpretation and the required simulation consistency

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If users explicitly handle indeterminate values in HDL code, then simulation accuracy can be improved, but code complexity and user burden increase

Engineering Contradiction:
Improveerror detection accuracyVSAvoidHDL code writing
Core Design Contradiction:
Measurement precisionVSEase of operation

Solution Approach 1:

The patent enables the HDL simulator to automatically handle indeterminate values without requiring user intervention. The system self-services by detecting indeterminate values in control expressions and automatically executing multiple alternatives with merging, eliminating the need for users to explicitly handle these cases in their HDL code while maintaining high error detection accuracy

Inventive Principle:
Principle #25Self-service

3Measurement precision

If simulations are performed at lower levels of abstraction, then accuracy is improved, but execution time increases

Engineering Contradiction:
Improvesimulation accuracyVSAvoidsimulation execution time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent changes the semantic parameters of indeterminate values to enable more accurate simulation at higher abstraction levels. By interpreting indeterminate values as causing multiple alternatives to be executed and merged, the system achieves gate-level accuracy in RTL simulation, eliminating the need for time-consuming lower-level simulations for certain verification tasks

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8271914B2Method and apparatus for simulating behavioral constructs using indeterminate values
Publication Date: 2012.09.18 SYNOPSYS INC
  • US8271914B2 patent drawing
  • US8271914B2 patent drawing
  • US8271914B2 patent drawing

AI summary

One embodiment of the present invention provides a system that simulates behavioral constructs of a register transfer level design using indeterminate values. The system may receive hardware description language code which includes a construct that behaves differently depending on the value of an expression, e.g., the construct may execute different portions of code based on the value of a control expression, or it may store data in different storage locations based on the value of an index expression, etc. In response to determining that the expression's value is indeterminate, the system can execute two or more alternatives that are controlled by the expression, and then merge the results in some prescribed way. An embodiment of the present invention can enable a user to reduce the discrepancy between the results generated by a register transfer level simulation and the results generated by the associated gate level simulation.