HDMI Network Receiver Phase Mismatch Compensation
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Solution Overview
Problem
In HDMI devices with the HEAC function, phase mismatches between transmission lines can generate unwanted differential mode signals, degrading the quality of HEC data.
Innovation Solution
A network receiver with delay units and variable capacitors that adjust signal delays and capacitances to optimize signal processing, generating high-quality HEC data by calculating differences and summations of signals, and adjusting circuitry to minimize phase mismatches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If transmission lines are used to transmit HEC and ARC data simultaneously, then integration of multimedia networking is achieved, but phase mismatch between transmission lines generates unwanted differential mode signals that degrade HEC data quality
Solution Approach 1:
An adjusting circuit is introduced as an intermediary component between the transmission lines and the signal processing unit. This adjusting circuit measures the phase difference between the two transmission lines and adjusts the delay of one line to compensate for the phase mismatch, thereby eliminating the unwanted differential mode signals and maintaining HEC data quality while preserving the integrated multimedia networking capability
2Reliability
If delay units are added to adjust signal timing, then phase mismatch compensation is achieved, but device complexity increases
Solution Approach 1:
The adjusting circuit changes the delay parameter of one transmission line dynamically based on the measured phase difference. By adjusting the delay time parameter rather than adding complex hardware structures, the system achieves phase synchronization while minimizing the increase in device complexity. The circuit uses variable delay elements that can be controlled to provide the necessary timing compensation
Data Source
AI summary
A network receiver and the adjusting method thereof, the network receiver includes a first delay unit, a second delay unit, a first processing unit and an adjusting circuit. The first delay unit is for delaying a first signal received from a first transmission line to generate a delayed first signal. The second delay unit is for delaying a second signal received from a second transmission line to generate a delayed second signal. The first processing unit is for processing a difference between the delayed first signal and the delayed second signal to generate first data. The adjusting circuit adjusts the first and second delay units to have a plurality of delay amount combinations, the first processing unit generates a plurality of first data respectively corresponding to the delay amount combinations, and the adjusting circuit adjusts delay amount of the first and second delay units according to the first data.