HDMI Optical Link Buffering for DDC Delay Synchronization

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Solution Overview

Problem

Optical links in HDMI systems experience data transmission errors due to transmission delays, particularly in the transmission of auxiliary data related to rendering and setting of the display sink.

Innovation Solution

An optical link system that includes a control logic circuit to store and adjust auxiliary data transmitted via the display data channel (DDC) to match the clock signal on the display source, ensuring minimal transmission delay, and includes control logic circuits at both the display source and sink to manage data transmission and acknowledgment signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If auxiliary data is transmitted via DDC from display sink to display source, then data transmission is enabled, but transmission delay causes data transmission errors

Engineering Contradiction:
Improvedata transmission accuracyVSAvoidtransmission delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The optical link receives and stores auxiliary data from the display sink in advance before the display source requests it. This preliminary storage eliminates the need for real-time transmission during data requests, thereby preventing transmission delays and ensuring data accuracy without timing errors.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If auxiliary data is transmitted in real-time via DDC, then data freshness is maintained, but transmission delay causes synchronization errors with clock signal

Engineering Contradiction:
Improvedata-clock synchronizationVSAvoidtransmission delay
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The optical link pre-receives and stores auxiliary data before it is needed, eliminating the need for real-time transmission that causes synchronization errors. The stored data is then provided to the display source without transmission delay, ensuring perfect synchronization with the clock signal.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If auxiliary data is stored in optical link, then transmission delay is eliminated, but additional circuitry increases device complexity

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoidoptical link circuitry
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The optical link serves as an intermediary component between the display sink and display source. It pre-receives and stores auxiliary data, then provides it to the display source when needed. This intermediary approach eliminates transmission delays while maintaining reasonable device complexity by using a dedicated buffer in the optical link rather than modifying the main devices.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Productivity

If DDC transmission is used for auxiliary data, then data exchange is enabled, but transmission speed is insufficient for rapid data exchange

Engineering Contradiction:
Improvedata exchange speedVSAvoiddata transmission accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The optical link pre-receives auxiliary data from the display sink and stores it in advance. When the display source requests data, it is provided immediately from the buffer without real-time transmission delays. This approach achieves both rapid data exchange and high transmission accuracy.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20260012681A1Optical link supporting HDMI
Publication Date: 2026.01.08 OPTICIS CO LTD
  • US20260012681A1 patent drawing
  • US20260012681A1 patent drawing
  • US20260012681A1 patent drawing

AI summary

Provided is an optical link capable of preventing data transmission errors due to transmission delay. Also, provided is an optical link enabling rapid transmission of auxiliary data related to rendering of a display sink or setting of a main channel.