HDMI Optical Link for Auxiliary Data Synchronization
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Solution Overview
Problem
Optical links in HDMI systems suffer from data transmission errors due to transmission delays, particularly in the transmission of auxiliary data related to rendering and setting of display sinks.
Innovation Solution
An optical link system is designed to store auxiliary data transmitted from a display sink with transmission delay and match it with a clock signal having little or no delay at the display source, using control logic circuits to adjust clock signals and transmit data only when synchronized, preventing misinterpretation of acknowledgment signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If auxiliary data is transmitted using the clock signal from the display source, then data communication is established, but transmission delay causes data to be misinterpreted as control signals
Solution Approach 1:
The patent stores auxiliary data in advance before transmission delay causes misinterpretation. The control logic circuit captures and holds auxiliary data received from the display sink, then transmits it to the display source after the delayed clock signal period, preventing the data from being misread as control signals during the delay window.
Solution Approach 2:
The patent introduces a control logic circuit as an intermediary between the display sink and display source. This intermediary component manages the timing and transmission of auxiliary data, separating it from the clock signal path and ensuring proper synchronization to prevent misinterpretation during transmission delay.
2Productivity
If auxiliary data transmission is performed in real-time, then communication speed is maintained, but data errors occur due to clock signal delay
Solution Approach 1:
The control logic circuit performs preliminary storage of auxiliary data immediately upon receipt from the display sink, before the transmission delay would cause it to be misinterpreted. This preliminary action allows the system to maintain real-time communication flow while ensuring data integrity by preparing data for delayed transmission.
Solution Approach 2:
The patent dynamically adjusts the transmission timing of auxiliary data based on the clock signal delay characteristics. The control logic circuit monitors the delayed clock signal and adapts the transmission timing accordingly, allowing the system to maintain high communication speed while accommodating the inherent delay to prevent data errors.
Data Source
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AI summary
Provided is an optical link capable of preventing data transmission errors due to transmission delay. Also, provided is an optical link enabling rapid transmission of auxiliary data related to rendering of a display sink or setting of a main channel.