HDMI Sink Pixel Clock Mapping for Faster Video Output

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Solution Overview

Problem

HDMI sink devices experience video output delays of 2 to 3 seconds due to the time required to check for VIC information and calculate pixel clock frequency, leading to inconvenience in user viewing experience.

Innovation Solution

A sink device equipped with a memory to store a mapping table and a controller to obtain pixel clock frequency based on horizontal and vertical total values and output frequency, allowing quick calculation of pixel clock frequency using the mapping table.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the sink device checks VIC information and calculates pixel clock frequency in real-time, then the device can support various video formats, but the video output delay increases to 2-3 seconds

Engineering Contradiction:

Improvevideo format compatibilityVSAvoidvideo output delay

Core Design Contradiction:

Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent pre-calculates and stores pixel clock frequencies for various video resolutions and frame rates in a lookup table during device initialization. When a video signal is received, the sink device simply queries the pre-computed table using the detected resolution and frame rate, eliminating the need for real-time calculation and reducing output delay to nearly instantaneous.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent anticipates potential video format variations by pre-computing pixel clock values for a comprehensive range of resolutions and frame rates, storing them in advance. This cushioning approach ensures that regardless of which video format is transmitted, the corresponding pixel clock frequency is already available, preventing any calculation delays.

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

2Adaptability or versatility

If the sink device performs real-time pixel clock frequency calculation, then the device can handle undefined DTD timing signals, but the processing time increases significantly

Engineering Contradiction:

ImproveDTD timing signal compatibilityVSAvoidvideo processing speed

Core Design Contradiction:

Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent pre-calculates pixel clock frequencies for all possible DTD timing signal parameters including various resolutions, frame rates, and timing configurations. These pre-computed values are stored in a lookup table that can be quickly queried, transforming a complex real-time calculation problem into a simple data retrieval operation.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent creates a copy of all possible pixel clock frequency values and stores them in a lookup table based on resolution and frame rate parameters. Instead of calculating the correct pixel clock frequency from scratch for each incoming video signal, the device copies the pre-stored value that matches the signal's parameters, dramatically reducing processing time.

Inventive Principle:

Principle #26Copying

Data Source

PatentUS12615344B2Sink device and operating method thereof

Publication Date: 2026.04.28 LG ELECTRONICS INC

AI summary

The sink device according to an embodiment of the present disclosure comprises a memory configured to store a mapping table, an external device interface configured to receive a video signal from a source device through HDMI (High-Definition Multimedia Interface) standard and a controller configured to obtain a horizontal total value, a vertical total value, and an output frequency based on the video signal, obtain a pixel clock frequency mapped to the horizontal total value, the vertical total value, and the output frequency from the mapping table, and output the video signal based on the obtained pixel clock frequency.