High Aspect Ratio Trench Isolation Using HDP and SOD Layers
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Solution Overview
Problem
Current semiconductor manufacturing techniques face challenges in filling trenches with high aspect ratios, leading to issues such as inadequate gap-filling, deformation, cracks, and punch-through due to stress differences between HDP and SOD layers, which complicates the formation of reliable isolation structures in high-integration devices.
Innovation Solution
A semiconductor device and manufacturing method involving a combination of a dense HDP layer and a flowable SOD layer, where the HDP layer is used to surround the SOD layer, ensuring proper filling of trenches and preventing deformation, cracks, and stress-related issues, while maintaining the gap-fill capability of the SOD layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a single HDP layer is used to fill the trench, then the trench can be filled, but adequate gap-filling becomes impossible as the trench width decreases with high integration
Solution Approach 1:
The isolation structure is divided into multiple layers: a first insulation layer (HDP) and a second insulation layer (SOD). The HDP layer provides a foundation with good step coverage, while the SOD layer provides excellent gap-fill capability. This segmentation allows each layer to contribute its strengths, enabling effective trench filling in highly integrated devices where single-layer approaches fail.
2Manufacturing precision
If a single SOD layer is used to fill the trench, then the trench can be filled, but contraction occurs due to moat phenomenon and the SOD layer becomes deformed
Solution Approach 1:
The HDP layer is deposited first to provide a stable, non-deforming foundation before the SOD layer is applied. This preliminary layer cushions against the moat phenomenon and prevents the SOD layer from deforming during subsequent processing steps, thereby maintaining structural integrity while preserving gap-fill capability.
3Manufacturing precision
If the stack of SOD layer and HDP layer is used to form isolation structures, then gap-filling capability is improved, but cracks and punch-through occur due to stress differences between the layers
Solution Approach 1:
The deposition parameters of the HDP layer are specifically optimized (using low power conditions with source power of 3,000-7,000 W and bias power of 1,000-1,500 W) to control stress characteristics. This parameter adjustment ensures that the HDP layer has complementary stress to the SOD layer, allowing the stress differences to compensate for each other and prevent cracks and punch-through while maintaining excellent gap-filling capability.
4Ease of manufacture
If conventional trench filling methods are used, then the process is simple, but inadequate gap-filling occurs in trenches with high aspect ratios
Solution Approach 1:
The patent employs a composite insulation structure combining HDP and SOD materials. The HDP layer provides good step coverage and structural stability, while the SOD layer contributes excellent gap-fill properties. This composite approach achieves adequate gap-filling in high aspect ratio trenches while remaining compatible with existing semiconductor manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for effective filling of trenches with high aspect ratios, preventing electrical failures and maintaining process margins, thereby ensuring the reliability of isolation structures and preventing deformation and stress-related issues in semiconductor devices.
Implementation Method 1
an HDP (high density plasma) layer
Implementation Method 2
an SOD (spin-on dielectric) layer
Data Source
AI summary
A semiconductor device having high aspect ratio isolation trenches and a method for manufacturing the same is presented. The semiconductor device includes a semiconductor substrate, a first insulation layer, and a second insulation layer. The semiconductor substrate has a second trench that is wider than a first trench. The first insulation layer is partially formed within the wider second trench in which the first insulation layer when formed clogs the opening of the narrower first trench. A cleaning of the first insulation layer unclogs the opening of the narrower first trench in which a second insulation layer can then be formed within both the first and second trenches.