Header Error Correction Using Erasure Bit Enumeration
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Solution Overview
Problem
Current error correction methods in Bluetooth communication, specifically using 1/3 FEC and HEC, do not fully utilize redundant information, leading to inefficiencies and potential packet loss due to undetected errors in the packet header.
Innovation Solution
A method and device that utilize redundant information in HEC for concatenated decoding, identifying erasable error bits, enumerating possible combinations, and feeding these combinations into a header correction checker to achieve accurate error correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If 1/3 FEC algorithm uses Majority Decision Decoding for error correction, then error correction capability is achieved, but redundant information in HEC is not fully utilized
Solution Approach 1:
The patent segments the error correction process into two distinct stages: inner code decoding (HEC) and outer code decoding (1/3 FEC). The HEC stage first identifies and corrects errors using cyclic redundancy check, then the 1/3 FEC stage performs majority decision decoding on the remaining errors. This segmentation allows each decoding stage to specialize in different error types, fully utilizing the redundant information in HEC while maintaining robust error correction capability.
2Measurement precision
If HEC error is detected in Packet Header, then error detection accuracy is improved, but communication performance deteriorates due to packet loss
Solution Approach 1:
The patent implements a cushioning mechanism by performing HEC error detection and correction before the packet is fully processed. When HEC errors are detected in the Packet Header, the concatenated decoding process uses the redundant HEC information to attempt correction before final packet validation. This beforehand cushioning prevents complete packet loss by providing a safety net that can recover from header errors, thus maintaining communication performance while preserving high error detection accuracy.
3Ease of operation
If traditional separate decoding methods are used for HEC and 1/3 FEC, then decoding simplicity is maintained, but error correction efficiency decreases
Solution Approach 1:
The patent merges the HEC and 1/3 FEC decoding processes into a unified concatenated decoding framework. Instead of treating them as completely separate operations, the system combines their functionalities where HEC provides initial error detection and correction, and 1/3 FEC provides additional error correction capability. This merging allows the system to leverage the strengths of both coding schemes, improving error correction efficiency while maintaining operational simplicity through a structured two-stage process.
Data Source
AI summary
A method of error decision, comprising: for each of a plurality of demodulated decision information in a codeword, identifying by a controller, a decoded bit for the demodulated decision as an erasable error bit if the demodulated decision information is larger than a first threshold and smaller than a second threshold; for all the identified erasable error bits, enumerating by a calculator, all possible combinations of the identified erasable error bits; for each combination of all enumerated possible combinations feeding by the calculator, each combination with all other decided decoded bits of the code word into a header correction checker; performing, by the header correction checker, header correction checking for each combination; and outputting, by a decision circuit connected to the header correction checker, a combination with a correct header correction check (HEC) result as an output sequence.