Hearing Device Clock Adjustment via Buffer Feedback

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Solution Overview

Problem

The mismatch in system clock frequencies between wirelessly connected hearing devices leads to inaccurate timing relationships and sample overflow/underflow events, degrading the perceptual quality of binaural beamformed audio signals, particularly in head-wearable devices with limited precision, temperature drift, and power consumption constraints.

Innovation Solution

A method to adjust the system clock frequency of a slave hearing device by detecting overflow and underflow events in the receipt and transmit buffers, using a digital processor to increase or decrease the frequency in predefined steps, synchronized with the master device's clock frequency, and employing near-field magnetic coupling for wireless communication.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If separate crystal-based clock generators are used in each hearing device, then device independence and wireless communication are enabled, but clock frequency mismatch and timing inaccuracies occur due to production tolerances and temperature drift

Engineering Contradiction:
Improvedevice independenceVSAvoidclock frequency accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent implements a feedback mechanism where the slave device continuously monitors buffer overflow and underflow events caused by clock frequency mismatch. Based on this feedback, the slave device automatically adjusts its clock frequency in predefined steps to minimize timing errors and maintain accurate synchronization with the master device, thereby resolving the contradiction between device independence and clock accuracy

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The slave device dynamically changes its clock frequency parameter in response to detected timing errors. By adjusting the clock frequency in predefined steps based on buffer status, the system adapts to temperature drift and production tolerances while maintaining synchronization, thus resolving the contradiction between using separate independent clocks and achieving accurate timing

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If higher precision clock generators are used, then timing accuracy between devices is improved, but device size, cost, and power consumption increase

Engineering Contradiction:
Improvetiming accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The system uses the existing low-power crystal-based clock generators in each device and adds a self-service synchronization mechanism. The slave device autonomously monitors its own buffer status and adjusts its clock frequency without requiring external intervention or higher-power reference clocks, thus achieving accurate timing while maintaining low power consumption and small device size

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent introduces buffer overflow/underflow detection as an intermediary mechanism that translates timing errors into actionable feedback. This intermediary allows the system to achieve high timing accuracy through software-based clock adjustment rather than requiring expensive, high-precision hardware clock generators, thereby reducing power consumption and device size

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If buffer realignment procedures are used to handle overflow events, then data loss is prevented, but audio signal latency increases and perceptual quality degrades

Engineering Contradiction:
Improvedata integrityVSAvoidaudio latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary clock frequency adjustment by the slave device based on predicted timing errors from buffer status monitoring. By proactively adjusting the clock frequency before significant overflow or underflow events occur, the system prevents data loss without needing frequent buffer realignment operations, thus maintaining low latency and high audio quality

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach minimizes clock skew, reduces latency, and enhances the perceptual quality of binaural audio processing by maintaining accurate timing alignment between the devices, even with limited precision clock generators, while being compact, inexpensive, and low-power.

Implementation Method 1

employing near-field magnetic coupling for wireless communication

Methodology Applied
Scientific EffectNear-field magnetic coupling: Electromagnetic Induction

Data Source

PatentUS12457458B2Reducing clock skew between clock signals of first and second hearing devices
Publication Date: 2025.10.28 GN HEARING AS
  • US12457458B2 patent drawing
  • US12457458B2 patent drawing
  • US12457458B2 patent drawing

AI summary

The present disclosure relates in one aspect to methods of adjusting a second system clock frequency of a slave or second device to a first system clock frequency of a first device connectable thereto via a unidirectional or bidirectional wireless data communication link so to reduce clock skew between the first and second system clock frequencies.