Heart Rate Setpoint Module With Low-Pass Filtering and Hysteresis

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Solution Overview

Problem

Existing leadless pacemakers face challenges in continuously calculating the optimal frequency of stimulation pulses to adapt to patient activity with high power consumption and reduced accuracy due to processor awakening delays, long-term retrospective analysis, and masked accelerometer signals.

Innovation Solution

A heart rate value calculation module with a conversion stage, low-pass digital filtering, and a combiner stage integrated into an ASIC circuit, operating without sleep mode, to continuously calculate and filter activity signals, ensuring low power consumption and accurate heart rate control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the processor is put into sleep mode to reduce power consumption, then energy savings are achieved, but the awakening delay causes reduced accuracy in heart rate calculation and delayed response to activity changes

Engineering Contradiction:
Improvepower consumptionVSAvoidheart rate calculation accuracy
Core Design Contradiction:
Use of energy by moving objectVSMeasurement precision

Solution Approach 1:

The processor operates in periodic cycles, alternating between active and sleep modes. During active periods, it performs heart rate calculations and processes activity signals. During sleep periods, it consumes minimal power. This periodic operation resolves the contradiction by achieving both power savings and maintaining calculation accuracy through timely awakening and processing.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The processor is awakened in advance of when calculations are needed, allowing it to transition from sleep mode to active mode before processing begins. This preliminary awakening eliminates delays in heart rate calculation and ensures accurate, timely response to activity changes while still maintaining power savings through controlled sleep periods.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If long-term retrospective analysis is performed to account for hysteresis, then heart rate control becomes more physiological, but power consumption increases due to extended processor operation

Engineering Contradiction:
Improvephysiological heart rate controlVSAvoidprocessor power consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The processor performs long-term retrospective analysis in advance, during dedicated active periods, to establish baseline heart rate patterns and hysteresis characteristics. This preliminary analysis allows the system to implement physiological heart rate control without requiring continuous processor operation, thereby reducing overall power consumption while maintaining adaptability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system performs retrospective analysis periodically rather than continuously, updating heart rate control parameters at scheduled intervals. This periodic approach maintains physiological adaptability through hysteresis accounting while significantly reducing processor power consumption compared to continuous operation.

Inventive Principle:
Principle #19Periodic action

3Speed

If the processor operates continuously without sleep mode, then heart rate adaptation response time is improved, but power consumption increases

Engineering Contradiction:
Improveheart rate adaptation response timeVSAvoidelectrical consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The processor is awakened in advance of activity changes to prepare for rapid heart rate adaptation. This preliminary awakening ensures that when activity changes occur, the processor is already active and can immediately process activity signals and adjust heart rate, achieving fast response times without requiring continuous operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The processor uses periodic active-sleep cycles optimized so that awakening and initial processing occur rapidly when needed. This allows the system to maintain fast heart rate adaptation response while still achieving power savings during sleep periods, resolving the contradiction between speed and energy consumption.

Inventive Principle:
Principle #19Periodic action

4Reliability

If accelerometer signals are masked during blanking periods to reduce noise, then measurement reliability improves, but signal accuracy decreases due to masked valid signals

Engineering Contradiction:
Improveaccelerometer signal reliabilityVSAvoidactivity signal accuracy
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The system performs preliminary analysis of accelerometer signals to identify valid activity patterns before applying blanking. This allows the system to distinguish between noise and genuine activity signals, applying masking only to noise periods while preserving valid signals, thereby maintaining both reliability and accuracy.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The blanking function operates periodically with optimized timing, activating only during periods when noise is likely and deactivating during periods when valid activity signals are expected. This periodic blanking maintains measurement reliability by filtering noise while preserving signal accuracy by allowing valid signals to pass through.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentEP4656234A1Module for calculating a heart rate setpoint for an implantable heart stimulator following the activity of a patient
Publication Date: 2025.12.03 CAIRDAC
  • EP4656234A1 patent drawingFigure 1~2
  • EP4656234A1 patent drawingFigure 3a~3b
  • EP4656234A1 patent drawingFigure 4~6

AI summary

The module includes: a conversion stage (110) receiving as input a sampled activity signal (ACTk) representative of the instantaneous activity of the patient and delivering as output a first target value (Xk) by application of a predetermined activity/heart rate function (F(ACT)); a recursive digital low-pass filter (130) calculating over a predetermined time a moving average of the first target value (Xk) delivered by the conversion stage (110) and giving as output a second target value (Zk); and a combiner stage (140) receiving as input the first target value (Xk) and the second target HR value (Zk) delivered by the first digital low-pass filtering stage (130), determining the maximum of the two target values ​​and giving as output the setpoint value (HRk) to control the stimulation frequency to the patient's activity.