Heat Sink Cut-Outs for Semiconductor Warpage and Thermal Management

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Solution Overview

Problem

Existing semiconductor devices face challenges in enhancing heat dissipation efficiency while minimizing substrate warpage, as the heat sink's bonding to only one semiconductor chip limits adhesive thickness and thermal conductivity, affecting both heat radiation and substrate stability.

Innovation Solution

The semiconductor device incorporates a heat sink with cut-out portions that do not cover the second semiconductor chips, allowing for a thinner adhesive with higher thermal conductivity and bonding to the substrate's corners to suppress warpage, thereby improving heat dissipation efficiency from the first semiconductor chip to the heat sink.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the heat sink covers only the first semiconductor chip, then the adhesive thickness can be reduced and heat radiation efficiency is improved, but the substrate warpage cannot be effectively suppressed

Engineering Contradiction:
Improveheat radiation efficiencyVSAvoidsubstrate warpage
Core Design Contradiction:
Loss of energyVSStability of the object's composition

Solution Approach 1:

The heat sink is divided into multiple independent bonding regions corresponding to different semiconductor chips. Each region can be independently bonded to the substrate, allowing the first region to have thin adhesive for heat efficiency while other regions provide warpage suppression support.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the heat sink are bonded to different locations on the substrate with different adhesive thicknesses. The region over the first semiconductor chip uses thin adhesive for heat dissipation, while regions at substrate corners use thicker adhesive for warpage control, creating local optimization of bonding characteristics.

Inventive Principle:
Principle #3Local quality

2Loss of energy

If the adhesive thickness is reduced to improve heat dissipation, then heat radiation efficiency increases, but the bonding strength and warpage suppression capability decrease

Engineering Contradiction:
Improveheat dissipation efficiencyVSAvoidadhesive bonding strength
Core Design Contradiction:
Loss of energyVSStrength

Solution Approach 1:

The bonding structure is segmented into multiple regions with different adhesive thicknesses. The first bonding region between the heat sink and substrate uses thin adhesive optimized for heat conduction, while other bonding regions use thicker adhesive optimized for mechanical strength and warpage suppression.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The adhesive layer exhibits local quality variation where thickness and material properties are optimized for different functions in different locations. Thin adhesive regions provide thermal pathways, while thick adhesive regions provide structural support and bonding strength.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances heat dissipation efficiency from the first semiconductor chip to the heat sink while effectively suppressing warpage of the wiring substrate, allowing for the use of adhesives with higher thermal conductivity without compromising bonding strength.

Implementation Method 1

The second surface is bonded to at least four corners of the first surface

Methodology Applied
Scientific EffectAdhesion: Adhesive

Implementation Method 2

the thickness of the adhesive can be made relatively thin, and the heat radiation efficiency from the first semiconductor chip to the heat sink can be increased

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS11049786B2Semiconductor device
Publication Date: 2021.06.29 RENESAS ELECTRONICS CORP
  • US11049786B2 patent drawing
  • US11049786B2 patent drawing
  • US11049786B2 patent drawing

AI summary

The semiconductor device includes a wiring substrate, a first and second semiconductor chips, and the heat sink. The wiring substrate has a first surface. The first and second semiconductor chips are disposed on the first surface. The heat sink is disposed on the first surface so as to cover the first semiconductor chip. The heat sink has a second surface and the third surface opposite the first surface. The second surface faces the first surface. The heat sink has a first cut-out portion. The first cut-out portion is formed at a position overlapping with the second semiconductor chip in plan view, and penetrates the heat sink in a direction from the third surface toward the second surface. The second surface is joined to at least four corners of the first surface.