Heat Spreader Layer for 3D IC Thermal Management

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Solution Overview

Problem

In 3D stacked integrated circuits, the hydrogen implantation method used for layer formation can damage the crystal lattice structure, requiring high-temperature thermal treatment to recover, which can deform underlying devices and interconnect layers, and heat removal remains a significant challenge due to high thermal resistance.

Innovation Solution

The integration of a heat spreader or shield layer with high thermal conductivity materials, such as copper or carbon nanotubes, between sensitive metal interconnect layers and the annealing region, and the use of optical annealing techniques to repair lattice damage at lower temperatures, along with enhanced power and ground distribution networks to facilitate heat transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If high-temperature thermal treatment is used to recover lattice damage, then crystal lattice structure is restored, but underlying devices and interconnect layers are deformed

Engineering Contradiction:
Improvecrystal lattice structureVSAvoiddeformation of underlying devices
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

A heat spreader layer with high thermal conductivity is introduced as an intermediary between the semiconductor layer and the underlying metal interconnect layers. This heat spreader absorbs and distributes the thermal energy during annealing, preventing direct thermal damage to the interconnect layers while still allowing sufficient heat to reach the semiconductor layer for lattice recovery

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the thermal parameters by using a heat spreader material with significantly higher thermal conductivity than the surrounding structures. This parameter change allows for more uniform heat distribution and controlled thermal profiles during annealing, enabling lattice recovery at lower peak temperatures or with more uniform heating that doesn't deform underlying structures

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If conventional thermal annealing is used to repair lattice damage, then crystal structure is recovered, but heat removal becomes difficult due to high thermal resistance

Engineering Contradiction:
Improvelattice damage recoveryVSAvoidheat removal efficiency
Core Design Contradiction:
Manufacturing precisionVSLoss of energy

Solution Approach 1:

The heat spreader layer serves as a thermal intermediary that facilitates heat removal. Its high thermal conductivity creates efficient thermal pathways from the semiconductor layer to the substrate and packaging structures, enabling effective heat dissipation after annealing or during operation

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces conventional thermal management approaches with a materials-based solution. Instead of relying on geometric heat sinks or active cooling systems, the high thermal conductivity material inherently provides thermal management through its material properties, passively conducting heat away from critical regions

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Manufacturing precision

If hydrogen implantation is used for layer formation, then single crystalline semiconductor layer is formed, but crystal lattice structure is damaged

Engineering Contradiction:
Improvesingle crystalline layer formationVSAvoidlattice structure damage
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The heat spreader layer acts as a protective intermediary during the annealing process. It enables the thermal treatment needed to repair hydrogen implantation damage while distributing the thermal load uniformly, preventing localized overheating that could cause additional lattice defects or deform underlying structures

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The introduction of the heat spreader enables optimization of annealing parameters. The high thermal conductivity material allows for shorter annealing times at lower temperatures, or more uniform heating profiles, which effectively repairs hydrogen damage while minimizing thermal budget and preventing secondary damage

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables defect-free single crystalline semiconductor layer formation at lower temperatures, reduces thermal resistance, and improves heat removal efficiency in 3D ICs, protecting underlying metal interconnects and enhancing the structural integrity and cooling capabilities of the devices.

Implementation Method 1

The integration of a heat spreader or shield layer with high thermal conductivity materials, such as copper or carbon nanotubes, between sensitive metal interconnect layers and the annealing region

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

the use of optical annealing techniques to repair lattice damage at lower temperatures

Methodology Applied
Scientific EffectOptical absorption: Absorption (EM radiation)

Implementation Method 3

optical annealing techniques to repair lattice damage at lower temperatures

Methodology Applied
Scientific EffectAnnealing: Annealing

Implementation Method 4

high thermal conductivity materials, such as copper or carbon nanotubes

Methodology Applied
Scientific EffectThermal conduction in carbon nanotubes: Carbon Nanotubes

Data Source

PatentUS9786636B2Semiconductor device and structure
Publication Date: 2017.10.10 MONOLITHIC 3D INC
  • US9786636B2 patent drawing
  • US9786636B2 patent drawing
  • US9786636B2 patent drawing

AI summary

An Integrated Circuit device, including: a base wafer including single crystal, the base wafer including a plurality of first transistors; at least one metal layer providing interconnection between the plurality of first transistors; a first wire structure constructed to provide power to a portion of the first transistors; a second layer of less than 2 micron thickness, the second layer including a plurality of second single crystal transistors, the second layer overlying the at least one metal layer; and a second wire structure constructed to provide power to a portion of the second transistors, where the second wire structure is isolated from the first wire structure to provide a different power voltage to the portion of the second transistors.