HEMT Transistors with Interface Layer for Recessed Gate
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing high-electron-mobility transistors (HEMTs) with recessed-gate terminals face issues of interface defectiveness between the GaN semiconductor layer and the gate dielectric, leading to reduced threshold voltage, high ON-state resistance, and low field-effect mobility, despite efforts to minimize these defects through cleaning and thermal treatments.
Innovation Solution
A method for manufacturing HEMTs involving the formation of an interface layer made of semiconductor compounds from Group III-V elements, such as AlxGa1-xN, which surrounds the recessed gate electrode, reducing interface defects and improving the device's performance by filling trench imperfections and optimizing the threshold voltage and ON-state resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If chemical etching is used to form the gate trench, then the gate terminal can be recessed to achieve normally-off operation, but interface defectiveness and surface damage are generated
Solution Approach 1:
A buffer layer is formed on the GaN surface before the chemical etching process to protect the surface from damage. This preliminary protective action prevents interface defectiveness while allowing the gate trench to be etched for normally-off operation.
Solution Approach 2:
The buffer layer acts as an intermediary between the GaN surface and the chemical etchant. It absorbs the harmful effects of the etching process while allowing the trench to be formed, thus protecting the GaN surface from direct exposure to the etchant's damaging effects.
2Manufacturing precision
If cleaning treatments (Piranha solution, HF, TMAH) are applied to reduce interface defectiveness, then surface roughness is reduced, but field-effect mobility remains relatively low
Solution Approach 1:
The buffer layer serves as a mediator that protects the GaN surface during cleaning treatments. It allows aggressive cleaning chemicals to remove surface contaminants and roughness without directly damaging the GaN surface, thereby preserving field-effect mobility while improving surface quality.
Solution Approach 2:
The buffer layer provides beforehand cushioning protection to the GaN surface against the harmful effects of aggressive cleaning treatments. This protective layer absorbs potential damage while enabling effective cleaning to reduce surface roughness and interface defectiveness.
3Object-affected harmful factors
If thermal treatment at high temperature (950°C) is applied to limit contaminant absorption, then absence of contamination is improved, but serious damage is caused to the GaN surface
Solution Approach 1:
The buffer layer acts as an intermediary protective barrier during high-temperature thermal treatment. It shields the GaN surface from direct exposure to temperatures that would cause serious damage, while still allowing the thermal treatment to effectively reduce contaminant absorption in the GaN layer.
Solution Approach 2:
The buffer layer is formed preliminarily on the GaN surface before thermal treatment to protect it from damage. This protective action enables the GaN surface to undergo thermal treatment at elevated temperatures without suffering serious damage, while still achieving reduced contaminant absorption.
4Ease of operation
If the gate trench is etched deeply to reach the GaN layer, then the recessed-gate structure is achieved, but extensive surface corrugations and damage are generated
Solution Approach 1:
The buffer layer serves as a protective intermediary during the deep etching process to form the gate trench. It allows the trench to be etched deeply enough to reach the GaN layer for proper recessed-gate operation while protecting the GaN surface from extensive corrugations and damage caused by the aggressive etching process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method achieves high electron mobility values close to 350 cm2/Vs, enhances the operational characteristics of HEMTs, and provides flexibility in designing heterostructures without damaging the GaN surface, allowing for optimal modulation of threshold voltage and ON-state resistance.
Implementation Method 1
an interface layer, of a semiconductor compound formed by elements of Groups III-V of the Periodic Table, which surrounds the recessed portion of the gate electrode
Data Source
AI summary
A method for manufacturing a HEMT transistor comprising the steps of: providing a wafer comprising a semiconductor body including a heterojunction structure formed by semiconductor materials that include elements of Groups III-V of the Periodic Table, and a dielectric layer on the semiconductor body; etching selective portions of the wafer, thus exposing a portion of the heterojunction structure; forming an interface layer by a surface reconstruction process, of a semiconductor compound formed by elements of Groups III-V of the Periodic Table, in the exposed portion of the heterojunction structure; and forming a gate electrode, including a gate dielectric and a gate conductive region, on said interface layer.