HELP PUF Bitstring Generation Using Voltage-Based Enrollment
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Solution Overview
Problem
Conventional security keys stored in non-volatile memory of ICs are vulnerable to invasive physical attacks, leading to potential cloning and unauthorized use, particularly in resource-constrained hardware tokens used in IoT applications, where area-heavy cryptographic primitives and NVM are less attractive.
Innovation Solution
A Hardware-Embedded Delay Physical Unclonable Function (HELP PUF) leverages path delay variations in core logic macros to generate random bitstrings, employing voltage-based enrollment and wave-differential dynamic logic to reduce bit flip errors and enhance security, eliminating the need for NVM by using existing functional units as entropy sources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If security keys are stored in non-volatile memory of ICs, then security key storage is achieved, but vulnerability to invasive physical attacks increases
Solution Approach 1:
The patent extracts the security key storage function from non-volatile memory and replaces it with a PUF-based generation mechanism. The PUF leverages inherent physical variations in the IC's logic macros to generate security keys dynamically, eliminating the need to store keys in vulnerable memory structures.
Solution Approach 2:
The PUF system uses the IC's own logical effort variations and path delays as the entropy source for key generation. The inherent physical characteristics of the device's logic macros serve as the security foundation, making the system self-securing without requiring external key storage.
2Reliability
If conventional security schemes are used in resource-constrained hardware tokens, then security functionality is provided, but area overhead increases
Solution Approach 1:
The patent makes existing logic macros serve dual purposes: their primary computational function and their role as entropy sources for PUF key generation. This multi-functionality eliminates the need for dedicated security hardware, reducing area overhead while maintaining security functionality.
Solution Approach 2:
The IC's existing logical effort variations and manufacturing tolerances are leveraged as the security mechanism. The device uses its own inherent physical characteristics without requiring additional security-specific components, achieving area-efficient security in resource-constrained environments.
3Reliability
If path delay variations are used for PUF bitstring generation, then random bitstring generation is achieved, but bit flip errors occur due to environmental variations
Solution Approach 1:
The patent performs preliminary characterization of path delays during an enrollment phase, establishing reference values before the device is deployed. This pre-characterization allows the system to compensate for environmental variations during operation by comparing current measurements against the established baseline, reducing bit flip errors.
Solution Approach 2:
The system implements feedback mechanisms that monitor path delay variations and adjust bitstring generation accordingly. By continuously comparing current path delays against reference values and applying corrections, the system maintains bitstring stability despite temperature and voltage fluctuations.
Data Source
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AI summary
A Hardware-Embedded Delay Physical Unclonable Function ("HELP PUF") leverages entropy by monitoring path stability and measuring path delays from core logic macros. Reliability and security enhancing techniques for the HELP PUF reduce bit flip errors during regeneration of the bitstring across environmental variations and improve cryptographic strength along with the corresponding difficulty of carrying out model building attacks. A voltage-based enrollment process screens unstable paths on normally synthesized (glitchy) functional units and reduces bit flip errors by carrying out enrollment at multiple supply voltages controlled using on-chip voltage regulators.