HEMT Gate-Field Plate Layout With Airgap for Lower Capacitance
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Solution Overview
Problem
Existing high electron mobility transistors (HEMTs) face challenges in reducing gate-to-source capacitance and require complex processing steps for separate field plate metal deposition.
Innovation Solution
The proposed solution involves forming a high electron mobility transistor (HEMT) with a gate metal and a field plate made from the same material, with an airgap between them, eliminating the need for separate metal deposition processes and reducing gate-to-source capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate field plate metal deposition is used, then the field plate can be formed with different material properties, but the manufacturing process complexity increases due to additional masking and alignment steps
Solution Approach 1:
The patent merges the gate metal and field plate into a single continuous metal layer, eliminating the need for separate deposition processes. This single metal layer is selectively patterned to form both the gate and field plate regions, reducing manufacturing complexity while maintaining electrical functionality.
Solution Approach 2:
The single metal layer serves multiple functions: it acts as both the gate metal and field plate material. By using one material layer for two distinct functional regions, the patent simplifies the manufacturing process while maintaining the adaptability to control electrical properties through selective patterning and etching.
2Adaptability or versatility
If separate field plate metal deposition is used, then the field plate can be independently optimized, but the manufacturing time and productivity decrease due to additional process steps
Solution Approach 1:
The patent combines the deposition of gate metal and field plate metal into a single deposition step, creating one continuous metal layer that is subsequently patterned. This eliminates multiple deposition cycles and associated masking/alignment operations, significantly improving manufacturing throughput while maintaining the ability to independently optimize each region's geometry.
Solution Approach 2:
The patent performs preliminary patterning of the single metal layer to define both gate and field plate regions in one process step. By establishing the complete metal pattern early in the fabrication sequence, subsequent processing can proceed without waiting for additional metal depositions, thereby accelerating overall manufacturing.
3Adaptability or versatility
If the gate metal and field plate are made from different materials, then each can be optimized for its specific function, but the gate-to-source capacitance increases due to additional interfaces
Solution Approach 1:
The patent merges the gate metal and field plate into a single continuous metal layer without an intervening interface. This eliminates the metal-metal interface that would otherwise contribute to gate-to-source capacitance, while still allowing independent electrical connection and geometric optimization of each region through selective etching and contact formation.
Solution Approach 2:
The patent maintains different local properties within the single metal layer by selectively etching or patterning different regions. The gate region and field plate region can have different thicknesses, patterns, or connections to underlying structures, enabling functional optimization while avoiding the harmful effects of an additional metal interface.
Data Source
AI summary
The present disclosure relates to semiconductor structures and, more particularly, to high electron mobility transistors and methods of manufacture. The structure includes: a semiconductor substrate; a gate structure on the semiconductor substrate; a gate metal connecting to the gate structure; and a field plate connected to a source region of the gate structure. The gate metal and the field plate include a same material.