HEMT and Capacitor Mesa Structure for Electrical Isolation

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Solution Overview

Problem

The integration of high electron mobility transistors (HEMT) and capacitors in semiconductor devices requires effective isolation and structural design to prevent interference and enhance performance, which existing technologies have not adequately addressed.

Innovation Solution

A semiconductor device design featuring a substrate with HEMT and capacitor regions, mesa isolations, and a buffer layer, where the HEMT is isolated using a mesa isolation process and a hard mask, and a capacitor is integrated with a dielectric layer, allowing independent operation and improved performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If HEMT and capacitor are integrated on the same substrate, then device functionality and performance are enhanced, but electrical interference and isolation difficulties arise

Engineering Contradiction:
Improvedevice functionalityVSAvoidelectrical interference
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The substrate is divided into distinct HEMT region and capacitor region, with each region isolated by mesa structures. This segmentation allows both devices to coexist on the same substrate while preventing electrical interference between them.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A buffer layer is introduced as an intermediary between the substrate and the active device regions. This buffer layer serves as an electrical isolation medium that prevents harmful electrical interference while allowing both HEMT and capacitor to function on the same substrate.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If mesa isolation is used to separate HEMT and capacitor regions, then electrical isolation is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveelectrical isolationVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The mesa isolation structures for both HEMT and capacitor regions are combined into a single fabrication process sequence. The same mesa formation techniques and material layers are used for both regions, reducing the number of separate manufacturing steps despite the increased isolation requirements.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If buffer layer is added between substrate and isolations, then electrical isolation and performance are enhanced, but manufacturing steps increase

Engineering Contradiction:
Improveelectrical isolationVSAvoidmanufacturing steps
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The buffer layer serves multiple functions simultaneously: it provides electrical isolation between the substrate and active regions, serves as a structural foundation for the mesa isolations, and contributes to the overall device performance. This multi-functionality justifies the additional manufacturing step.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12009415B2High electron mobility transistor and method for fabricating the same
Publication Date: 2024.06.11 UNITED MICROELECTRONICS CORP
  • US12009415B2 patent drawing
  • US12009415B2 patent drawing
  • US12009415B2 patent drawing

AI summary

A semiconductor device includes a substrate having a high electron mobility transistor (HEMT) region and a capacitor region, a first mesa isolation on the HEMT region, a HEMT on the first mesa isolation, a second mesa isolation on the capacitor region, and a capacitor on the second mesa isolation. The semiconductor device further includes buffer layer between the substrate, the first mesa isolation, and the second mesa isolation, in which bottom surfaces of the first mesa isolation and the second mesa isolation are coplanar.