HEMT Channel Orientation to Mitigate Microcrack Resistance
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Solution Overview
Problem
The performance and reliability of III-nitride transistor devices are degraded due to microcracks formed during fabrication and operation, caused by lattice mismatch and thermal expansion coefficient differences between III-nitride epitaxial layers and silicon substrates, leading to strain and stress-induced defects in the channel regions of HEMTs.
Innovation Solution
The alignment of the channel region long axis perpendicular to the microcrack long axis, with controlled angles to minimize the effects of microcracks, combined with the use of a thin gate dielectric layer and optimized gate structure to reduce leakage and series resistance, enhances the performance and reliability of HEMTs by minimizing resistance increases and maintaining stable operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If III-nitride epitaxial layers are grown on silicon substrates, then manufacturing cost is reduced and substrate availability is improved, but microcracks form in the channel layers due to lattice mismatch and thermal expansion differences
Solution Approach 1:
The patent applies preliminary action by rotating the substrate during the epitaxial growth process to control the formation and orientation of microcracks before they can significantly degrade device performance. This proactive measure allows the microcracks to form in predetermined, less harmful orientations rather than allowing them to form randomly during cooling after deposition.
Solution Approach 2:
The patent employs parameter changes by modifying the substrate rotation parameters during epitaxial growth to control microcrack orientation. By adjusting rotation speed, rotation direction, and rotation timing during different stages of growth, the patent optimizes the crystal structure development to minimize the harmful effects of thermal expansion mismatch and lattice differences between III-nitride layers and silicon substrates.
2Manufacturing precision
If substrate temperature is increased to 1000°C during deposition to improve epitaxial layer quality, then layer quality is improved, but thermal stress and microcrack formation increase during cooling
Solution Approach 1:
The patent applies preliminary action by implementing controlled substrate rotation during the high-temperature deposition and subsequent cooling phases. This rotation is established before microcracks can form in harmful orientations, allowing the system to withstand the thermal stress of 1000°C deposition while directing crack formation into less detrimental patterns during the cooling process.
Solution Approach 2:
The patent employs dynamics by making the substrate rotation parameters variable rather than static. The rotation speed, direction, and timing are dynamically adjusted during different stages of the deposition and cooling process to optimize layer quality at high temperature while minimizing thermal stress accumulation and microcrack formation during temperature transitions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces the unwanted resistance increase caused by microcracks, ensuring stable and reliable performance of HEMTs in power switching and millimeter wave applications, with improved thermal stability and high-frequency operation.
Implementation Method 1
there is often a mismatch in their thermal expansion coefficients and their lattices. These differences in thermal expansion coefficients and lattices will induce strain or stresses in the epitaxial III-nitride thin films and the substrate during cooling or heating stages.
Data Source
AI summary
In HEMTs based on III-nitrides epitaxial films or GaAs, AlGaAs and InGaAs epitaxial films, unwanted microcracks are often formed in the composite epitaxial layers in the channel region during fabrication and operation. These microcracks are caused by strain or stresses due to lattice mismatch and thermal expansion coefficient differences between materials and substrate's. Those microcracks will bring about an increase in source to drain resistance and lead to performance and reliability degradation of the HEMTs and the MMICs containing them. The present invention provides HEMTs with minimized effects of the unwanted microcracks by aligning the channel region long axis to a certain direction so that the channel region long axis forms a right angle with axis of at least one type of the microcracks.


