HEMT Doped Substrate for High Breakdown Voltage

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Solution Overview

Problem

High electron mobility transistors (HEMTs) face challenges in achieving high breakdown voltage due to electron injection and lattice mismatch issues, limiting their application in higher voltage scenarios.

Innovation Solution

A high electron mobility transistor (HEMT) design with a doped substrate, a graded nucleation layer, and a channel layer, where the substrate is doped with p-type dopants and a graded layer is used to reduce electron injection and lattice mismatch, forming a two-dimensional electron gas (2-DEG) with a band gap discontinuity, enabling higher breakdown voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a HEMT is designed with conventional undoped substrate and heterojunction structure, then high electron mobility is achieved, but breakdown voltage is limited due to electron injection and lattice mismatch

Engineering Contradiction:
Improvebreakdown voltageVSAvoidelectron injection
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The substrate is doped with p-type dopants before forming the heterojunction structure, creating a preliminary compensated region that prevents electron injection from the substrate into the channel. This preliminary action eliminates the harmful electron injection effect before it can occur during device operation, enabling higher breakdown voltage.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The electrical parameters of the substrate are changed by introducing p-type dopants, transforming it from an undoped or n-type substrate to a p-type doped substrate. This parameter change creates a compensated region at the substrate interface that blocks electron injection and enables the device to achieve breakdown voltages of at least 800 volts.

Inventive Principle:
Principle #35Parameter changes

2Speed

If different semiconductor materials are used to form heterojunction for high electron mobility, then electron mobility and frequency transmission are improved, but lattice mismatch causes structural defects and limits voltage application

Engineering Contradiction:
Improveelectron mobilityVSAvoidlattice mismatch
Core Design Contradiction:
SpeedVSStability of the object's composition

Solution Approach 1:

The substrate is given a different local quality (p-type doping) compared to the channel layer, creating a compensated region specifically at the interface where lattice mismatch occurs. This localized quality change addresses the lattice mismatch problem without affecting the high electron mobility properties of the main heterojunction structure.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The p-type doped substrate acts as an intermediary layer between the substrate material and the heterojunction structure. This intermediary region compensates for lattice mismatch effects and prevents direct interaction between the mismatched lattices, allowing the high electron mobility heterojunction to function at higher voltages.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design achieves a breakdown voltage of at least 800 volts, allowing HEMTs to be used in higher voltage applications while minimizing material waste and production costs.

Implementation Method 1

doping a substrate with p-type dopants to compensate for electrons

Methodology Applied
Scientific EffectDoping: Dopants

Implementation Method 2

the active layer has a band gap discontinuity with the channel layer, forming a two-dimensional electron gas (2-DEG)

Methodology Applied
Scientific EffectBand gap discontinuity:

Data Source

PatentUS8901609B1Transistor having doped substrate and method of making the same
Publication Date: 2014.12.02 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8901609B1 patent drawing
  • US8901609B1 patent drawing
  • US8901609B1 patent drawing

AI summary

A transistor includes a substrate, wherein a top portion of the substrate is doped with p-type dopants to a dopant concentration ranging from about 1×1018 ions/cm3 to about 1×1023 ions/cm3. The transistor further includes a graded layer on the substrate and a channel layer on the graded layer. The transistor further includes an active layer on the channel layer, wherein the active layer has a band gap discontinuity with the channel layer.