HEMT Drain Field Plate for Breakdown Voltage and Thermal Management
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Solution Overview
Problem
High electron mobility transistors (HEMTs) face challenges in achieving high breakdown voltages, maintaining flat gate-drain capacitance, and effective heat dissipation, especially in high-power and radio frequency applications, where existing designs are limited by form factor and substrate materials' conductivity and insulation properties.
Innovation Solution
A drain field plate with a larger metal pad projection area is introduced, forming a Metal-semiconductor Schottky junction to increase breakdown voltage, and backside processing is performed to enhance heat dissipation by removing substrate under the active area and depositing high-conductivity metal layers, which also improves electrical insulation and reduces bulk leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a source-connected gate field plate is used to increase breakdown voltage, then breakdown voltage is improved, but gate-drain capacitance becomes non-flat in dynamic driving range
Solution Approach 1:
The field plate structure is segmented into two distinct parts: a gate field plate connected to the gate for voltage control, and a drain field plate connected to the drain for capacitance management. This segmentation allows independent optimization of breakdown voltage (via gate field plate) and linearity (via drain field plate with larger area to flatten Cgd), resolving the contradiction between these two parameters.
2Temperature
If the heterojunction area is made as large as possible to dissipate heat energy quickly, then heat dissipation is improved, but device area increases beyond form factor limitations
Solution Approach 1:
The invention extends the heat dissipation solution from the traditional planar dimension to the vertical dimension by forming a via structure that penetrates through the substrate. This via connects the heterojunction region to a heat sink or heat dissipation layer beneath the substrate, enabling three-dimensional heat management. Consequently, heat can be dissipated efficiently through the vertical path without requiring a larger lateral device area, thus resolving the contradiction between heat dissipation capability and form factor constraints.
3Power
If high power ranges are designed to deliver large currents, then power output is improved, but junction temperature increases requiring better insulation
Solution Approach 1:
The via structure acts as an intermediary thermal pathway between the hot heterojunction region and the substrate/heat sink. This intermediary channel provides a dedicated low-resistance thermal path that separates the high-power current flow from the heat dissipation path, allowing large currents to flow through the heterojunction while heat is efficiently conducted away through the via to the substrate, thus enabling high power output without excessive junction temperature rise.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution increases breakdown voltage, enhances RF characteristics, reduces junction temperature, and increases power handling capacity while simplifying manufacturing by eliminating the need for eutectic die attach processes and reducing manufacturing costs.
Implementation Method 1
The drain field plate and the underlying semiconductor layer forms Metal-semiconductor (M-S) Schottky junction that generates depletion layer in the semiconductor
Implementation Method 2
the drain field plate and the underlying semiconductor layer forms Metal-semiconductor (M-S) Schottky junction that generates depletion layer in the semiconductor, where the depletion layer increases the breakdown voltage
Implementation Method 3
The drain field plate reduces the strength of the electric field that is generated by the gate side drain pad, resulting in the increase of the breakdown voltage
Implementation Method 4
backside processing is performed to enhance heat dissipation by removing substrate under the active area and depositing high-conductivity metal layers
Data Source
Figure 1~3
Figure 4~6
Figure 7~8
AI summary
HEMT having a drain field plate (140) is provided. The drain field plate (140) is formed in the area between the gate (118) and drain (104) of a HEMT. The drain field plate (140) includes a metal pad (140) that has a larger projection area than the drain pad (104). The drain field plate (140) and semiconductor layer (102) disposed beneath the drain field plate form a metal-semiconductor (M-S) Schottky structure. The capacitance of the M-S Schottky structure generates capacitance in the semiconductor area (102), which increases the breakdown voltage of the transistor components of the HEMT. A portion of the substrate (100) under the active area (203) may be removed to thereby increase the heat conductivity and reduce the junction temperature of the transistor components of the HEMT.