HEMT Field Mitigating Plate and Dielectric Segmentation
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Solution Overview
Problem
High electric fields in Group III nitride High Electron Mobility Transistors (HEMTs) lead to charge trapping and excessive gate leakage, limiting device performance and stability at microwave and mm-wave frequencies, necessitating a semiconductor fabrication process that minimizes field-dependent degradation mechanisms.
Innovation Solution
A semiconductor fabrication method involving the growth of a protective dielectric layer by molecular beam epitaxy, formation of self-aligned field-mitigating plates, and ohmic via gap metallizations to reduce electric fields and prevent charge trapping, while maintaining compatibility with existing processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a protective dielectric layer is grown on the semiconductor surface to minimize surface trap formation, then device reliability is improved, but ohmic and Schottky contacts require etching through substantially all of the protective layer, adding fabrication complexity
Solution Approach 1:
The protective dielectric layer is segmented into multiple layers: a first protective dielectric layer and a second protective dielectric layer. The first layer is etched to form contact holes, while the second layer remains intact during this process. This segmentation allows contact formation without compromising the overall protective function, reducing fabrication complexity while maintaining device reliability.
Solution Approach 2:
The first protective dielectric layer is etched to form contact holes before depositing the second protective dielectric layer. This preliminary action allows subsequent ohmic and Schottky contacts to be formed through pre-created openings in the first layer, eliminating the need to etch through both layers and reducing overall fabrication complexity.
2Power
If high electric fields are present in the HEMT structure to enable high voltage and high power operation, then power performance is improved, but charge trapping and excessive gate leakage increase, limiting device stability
Solution Approach 1:
A field mitigating plate is introduced as an intermediary element between the gate and the drain region. This plate reduces the electric field in critical regions where charge trapping and gate leakage occur, allowing the device to operate at high voltages and powers while maintaining stability by mitigating field-dependent degradation mechanisms.
Solution Approach 2:
The electric field distribution is made non-uniform through the introduction of the field mitigating plate. The plate creates localized field reduction in specific regions (near the gate and at the drain edge) while maintaining high fields in other regions necessary for power operation. This local quality modification allows simultaneous achievement of high power performance and device stability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enhances device reliability by reducing electric field-dependent phenomena, increasing electrical breakdown, and minimizing radio-frequency dispersion, thereby enabling reliable operation at mm-wave frequencies with improved production efficiency and complexity.
Implementation Method 1
A protective dielectric layer can be grown on a semiconductor surface by molecular beam epitaxy (MBE) or another thin film deposition technique
Implementation Method 2
The ohmic metal is then annealed at a predetermined temperature and additional metallizations are subsequently deposited in the ohmic via gaps
Data Source
AI summary
A semiconductor device is fabricated to include source and drain contacts including an ohmic metal sunken into the barrier layer and a portion of the channel layer; a protective dielectric layer disposed between the source and drain contacts on the barrier layer; a metallization layer disposed in drain and source ohmic vias between the source contact and the protective dielectric layer and between the protective dielectric layer and the drain contact; and a metal T-gate disposed above the barrier layer including a field mitigating plate disposed on a side portion of a stem of the metal T-gate.