HEMT Gate Layout Without Source-Side Field Plate
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Solution Overview
Problem
In HEMT transistors with AlGaN/GaN heterojunctions, the distance between the gate and source terminals significantly affects current density, ON-state resistance, and transconductance, but reducing this distance increases the risk of short-circuits and capacitance, which negatively impacts RF gain.
Innovation Solution
The gate terminal is designed to maintain a constant distance from the source terminal without forming a field-plate element towards the source, reducing the risk of short-circuits and minimizing capacitance, thereby optimizing ON-state resistance and RF gain.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the distance between gate and source terminals is reduced, then current density and transconductance are improved, but the risk of short-circuits and capacitance increases
Solution Approach 1:
The gate terminal is positioned at a recessed depth relative to the source and drain terminals, creating a three-dimensional configuration. This vertical dimensionality change allows the gate to be closer to the channel for improved current density while maintaining adequate lateral spacing from the source terminal to reduce short-circuit risk and capacitance.
Solution Approach 2:
The gate terminal structure exhibits non-uniform geometry with different regions serving different functions: the recessed portion close to the channel optimizes current density, while the lateral extension controlled by insulation layer thickness manages capacitance and short-circuit prevention. This local quality variation resolves the contradiction between proximity for performance and distance for reliability.
2Productivity
If the distance between gate and source terminals is reduced, then transconductance is improved, but capacitance increases negatively impacting RF gain
Solution Approach 1:
By moving the gate terminal into a recessed dimension, the patent achieves close proximity to the channel for high transconductance while the lateral distance controlled by insulation layer thickness limits capacitance formation. The vertical positioning enables transconductance optimization without the harmful capacitance increase that would result from simple lateral proximity.
3Object-affected harmful factors
If field-plate element is formed towards source terminal, then electrical field is reduced, but short-circuit risk and capacitance increase
Solution Approach 1:
The patent selectively removes the field-plate element structure from the region between the gate and source terminals, retaining it only where needed near the drain terminal for electrical field management. This extraction eliminates the source-side capacitance and short-circuit risk while preserving field control where required.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances current density and transconductance while reducing ON-state resistance and capacitance, leading to improved RF gain and output power in HEMT transistors.
Implementation Method 1
transistors are known, which are based upon the formation of layers of two-dimensional electron gas (2DEG) with high mobility at a heterojunction, i.e., at the interface between semiconductor materials with different band gaps
Implementation Method 2
formation of layers of two-dimensional electron gas (2DEG) with high mobility at a heterojunction
Implementation Method 3
reducing the risk of short-circuits and minimizing capacitance, thereby optimizing ON-state resistance and RF gain
Data Source
AI summary
An HEMT includes: a heterostructure; a dielectric layer on the heterostructure; a gate electrode, which extends throughout the thickness of the dielectric layer; a source electrode; and a drain electrode. The dielectric layer extends between the gate electrode and the drain electrode and is absent between the gate electrode and the source electrode. In this way, the distance between the gate electrode and the source electrode can be designed in the absence of constraints due to a field plate that extends towards the source electrode.