HEMT Gate-Source Layout Without Source Field Plate
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Solution Overview
Problem
In HEMT transistors with AlGaN/GaN heterojunctions, the distance between the gate and source terminals significantly affects current density, ON-state resistance, and transconductance, but reducing this distance increases the risk of short-circuits and capacitance, which negatively impacts RF gain.
Innovation Solution
The gate terminal is designed to maintain a constant distance from the source terminal without forming a field-plate element towards the source, reducing the risk of short-circuits and capacitance, while optimizing the ON-state resistance and RF gain by eliminating the field-plate element between the gate and source.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the distance between gate and source terminals is reduced, then ON-state resistance decreases and current density increases, but the risk of short-circuits and capacitance increases which negatively impacts RF gain
Solution Approach 1:
The gate terminal is segmented into two distinct parts: a first gate terminal portion extending over the channel toward the drain, and a second gate terminal portion extending over the channel toward the source. This segmentation allows independent optimization of each portion's length, enabling the second portion to be shortened for lower capacitance while maintaining sufficient spacing to prevent short-circuits, thus resolving the contradiction between reliability and productivity
Solution Approach 2:
Different portions of the gate terminal are assigned different lengths based on local requirements. The first gate terminal portion has a length optimized for drain-side field control, while the second gate terminal portion has a reduced length specifically optimized to minimize capacitance with the source terminal. This local quality differentiation allows the gate structure to simultaneously achieve low short-circuit risk and high current density
2Reliability
If the gate-source distance is reduced, then ON-state resistance decreases, but capacitance increases which reduces RF gain
Solution Approach 1:
By dividing the gate terminal into two portions with independently optimized lengths, the invention enables the second gate terminal portion to be shortened, thereby reducing capacitance between the gate and source terminals. This reduction in capacitance improves RF gain while the overall gate structure maintains appropriate spacing to ensure low ON-state resistance
Solution Approach 2:
The gate terminal structure provides dynamic optimization by allowing different portions to have different dimensional characteristics. The variable length configuration enables the device to achieve optimal performance across different operating conditions, balancing low ON-state resistance with high RF gain through capacitive optimization
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces ON-state resistance, increases current density, and maximizes RF gain by minimizing capacitance and the risk of short-circuits, enhancing the performance of HEMT transistors for RF and low-voltage power applications.
Implementation Method 1
transistors are known, which are based upon the formation of layers of two-dimensional electron gas (2DEG) with high mobility at a heterojunction, i.e., at the interface between semiconductor materials with different band gaps
Implementation Method 2
the high concentration of electrons in the 2DEG enables a low ON-state resistance (RON) to be obtained
Data Source
AI summary
An HEMT includes: a heterostructure; a dielectric layer on the heterostructure; a gate electrode, which extends throughout the thickness of the dielectric layer; a source electrode; and a drain electrode. The dielectric layer extends between the gate electrode and the drain electrode and is absent between the gate electrode and the source electrode. In this way, the distance between the gate electrode and the source electrode can be designed in the absence of constraints due to a field plate that extends towards the source electrode.