HEMT Gate Spacer Structure for Dense Layout Alignment Tolerance
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Solution Overview
Problem
Conventional processing techniques for High Electron Mobility Transistors (HEMTs) are limited in achieving dense layout rules and efficient die area utilization, leading to high lithography requirements and alignment issues.
Innovation Solution
The use of dielectric spacers with varying widths and a gate electrode structure comprising two metals with different resistivities, allowing for minimal lithography and high alignment tolerance, enabling the formation of small device features with efficient die area use.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If conventional processing techniques are used to pattern dense layout rules, then die area utilization is maximized, but lithography requirements become excessively advanced and alignment precision deteriorates
Solution Approach 1:
The gate electrode structure performs self-alignment through the sequential deposition of materials with different resistivities. The first gate electrode material is deposited and patterned, then the second gate electrode material is deposited conformally over the first material and selectively removed in non-active regions. This self-aligned process eliminates the need for separate alignment steps, achieving dense layout rules without requiring advanced lithography alignment precision
Solution Approach 2:
The gate electrode is segmented into two distinct materials with different resistivities: a first gate electrode material with lower resistivity and a second gate electrode material with higher resistivity. This segmentation allows different regions of the gate to serve different functional purposes while being formed through a unified self-aligned process, maximizing die area utilization without compromising alignment precision
2Reliability
If advanced lithography is used to achieve dense layout rules, then device performance is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The self-aligned gate electrode structure eliminates the need for multiple separate lithography alignment steps. The pattern is defined once by the first gate electrode material deposition, and subsequent materials automatically align to this pattern through conformal deposition and selective removal. This reduces lithography complexity while maintaining device performance through precise feature definition
Solution Approach 2:
The invention changes the resistivity parameter of gate electrode materials by using two different materials with distinctly different resistivity values. This parameter differentiation enables functional optimization of the gate structure (lower resistivity regions for current conduction, higher resistivity regions for field control) without requiring complex lithography processes
Data Source
AI summary
A High Electron Mobility Transistor (HEMT) includes a source, a drain, a channel layer extending between the source and the drain, a barrier layer formed in contact with the channel layer, and extending between the source and the drain, and a gate formed in contact with, and covering at least a portion of, the barrier layer. The gate has gate edge portions and a gate central portion, and dielectric spacers may be formed over the gate edge portions, with the dielectric spacers having a first width therebetween proximal to the gate, and a second width therebetween distal from the gate, where the second width is longer than the first width.