HEMT Gate Trench Fabrication With Controlled Doped Region Depth

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Solution Overview

Problem

Existing methods for fabricating high electron mobility transistors (HEMTs) using GaN-based materials face challenges in achieving precise control over doped region formation, which affects device performance and resistance due to excessive doped region depth and the need for additional masking steps.

Innovation Solution

A method involving the formation of a buffer and barrier layer, followed by ion implantation through a hard mask to create a doped region in both layers, with subsequent etching and electrode formation, allowing for precise control over trench depth and electrode placement without excessive doped region depth and minimizing additional masking steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If ion implantation is performed through a hard mask to form a doped region, then the doped region depth can be controlled, but the process complexity increases due to additional masking steps

Engineering Contradiction:
Improvedoped region depth controlVSAvoidmasking process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent extracts and removes the hard mask and barrier layer after ion implantation to form a trench, eliminating the need for additional masking steps while maintaining precise doped region depth control. The hard mask serves its purpose during implantation and is then discarded, simplifying the overall process.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The hard mask is formed preliminarily on the barrier layer before ion implantation, enabling precise control of doped region depth. This preliminary masking action allows the implantation to be performed with accurate depth control, and the mask is subsequently removed, avoiding the need for additional masking steps.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the doped region depth is increased to improve device performance, then the electrical characteristics improve, but the resistance increases due to excessive depth

Engineering Contradiction:
Improvedevice performanceVSAvoidresistance
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent optimizes the ion implantation parameters (energy, dose, angle) to achieve the precise doped region depth required for improved device performance while minimizing resistance. By carefully controlling the implantation parameters, the doped region is formed at the optimal depth to enhance electrical characteristics without excessive resistance.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The doped region is formed with specific local properties through controlled ion implantation, creating a localized doping profile that improves device performance at the gate interface while maintaining low resistance. The doping concentration and depth are locally optimized to balance performance improvement with resistance control.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the fabrication of HEMTs with improved performance by controlling the doped region depth and reducing the complexity of masking processes, enhancing the device's electrical characteristics and manufacturing efficiency.

Implementation Method 1

performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS12125903B2High electron mobility transistor and method for fabricating the same
Publication Date: 2024.10.22 UNITED MICROELECTRONICS CORP
  • US12125903B2 patent drawing
  • US12125903B2 patent drawing
  • US12125903B2 patent drawing

AI summary

A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a first trench; forming a gate dielectric layer on the hard mask and into the first trench; forming a gate electrode on the gate dielectric layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.