III-Nitride HEMT Layer Structure for Impurity Diffusion Blocking

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Solution Overview

Problem

The diffusion of impurities, such as iron, from a high-resistance layer in a group III nitride multilayered structure into other layers disrupts the electrical characteristics, making it challenging to control the electrical properties of the structure effectively.

Innovation Solution

A group III nitride multilayered structure is designed with a diffusion suppressing layer containing indium (In) between the high-resistance impurity layer and the channel layer, where the impurity concentration is lower on the channel layer side, ensuring the impurity concentration remains below 2×10^15 cm^-3 continuously over at least 3 nm, effectively preventing impurity diffusion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If impurities are added to increase electrical resistance in a layer, then electrical insulation is improved, but impurity diffusion to other layers occurs causing electrical characteristic degradation

Engineering Contradiction:
Improveelectrical insulationVSAvoidimpurity diffusion
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

A diffusion suppressing layer is introduced as an intermediary between the high-resistance layer and the channel layer. This intermediate layer acts as a barrier that prevents impurity diffusion from the high-resistance layer to the channel layer, while allowing the high-resistance layer to maintain its electrical insulation function. The diffusion suppressing layer contains a group III element and optionally an alloying element that creates a concentration gradient to block impurity migration.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The structure is segmented into distinct functional layers: a high-resistance layer for electrical insulation, a diffusion suppressing layer for preventing impurity migration, and a channel layer for current conduction. By dividing the structure into separate segments with specific functions, the patent eliminates the conflict between needing impurities for insulation and preventing their diffusion to maintain channel performance.

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If a diffusion suppressing layer is introduced to prevent impurity diffusion, then electrical characteristic controllability is improved, but device structure complexity increases

Engineering Contradiction:
Improveelectrical characteristic controllabilityVSAvoidlayer structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The diffusion suppressing layer utilizes parameter changes in material composition and concentration gradients to achieve impurity blocking. By adjusting the concentration of group III elements and alloying elements, and controlling the thickness of the diffusion suppressing layer, the patent achieves effective impurity prevention without requiring overly complex multi-layer structures. The concentration gradient itself serves as the primary mechanism for diffusion suppression.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration substantially prevents impurity diffusion, stabilizing the electrical characteristics by maintaining the channel layer free of high-resistance impurities, thereby improving electrical insulation and reducing leakage current in high electron mobility transistors (HEMTs).

Implementation Method 1

a second layer disposed on the first layer and comprising a group III nitride containing In... a concentration of the impurity is lower on a third layer side than on a first layer side interposing the second layer therebetween

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Data Source

PatentUS20240355919A1Group iii nitride multilayered structure and high electron mobility transistor
Publication Date: 2024.10.24 SUMITOMO CHEM CO LTD
  • US20240355919A1 patent drawing
  • US20240355919A1 patent drawing
  • US20240355919A1 patent drawing

AI summary

There is provided a group III nitride multilayered structure, including: a first layer comprising a group III nitride; a second layer disposed on the first layer and comprising a group III nitride containing In; and a third layer disposed on the second layer and comprising a group III nitride, wherein the first layer contains an impurity that makes the group III nitride electrically highly resistive at least in a near-interfacial region, which is a region with a thickness of 50 nm from an interface between the first layer and the second layer, a concentration of the impurity is lower on a third layer side than on a first layer side interposing the second layer therebetween, and in the third layer, the concentration of the impurity reaches less than 2×1015 cm−3 continuously over a thickness of at least 3 nm, so that the third layer is substantially free of the impurity.