HEMT Insulating Structure Formation Without CMP Planarization
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing manufacturing methods for high electron mobility transistors (HEMTs) require planarization steps like chemical mechanical polishing, which are costly and equipment-intensive, limiting the ability to fabricate high-quality transistors without specialized machinery.
Innovation Solution
A method involving photolithography and etching back is used to form an insulating structure for HEMTs, eliminating the need for planarization steps and allowing for the creation of a flat surface insulating layer, enabling high-yield transistor fabrication even without a planarization machine.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If planarization steps like chemical mechanical polishing are used, then flat surface quality is improved, but manufacturing cost and equipment complexity increase
Solution Approach 1:
The patent extracts and eliminates the planarization step (chemical mechanical polishing) from the manufacturing process. Instead of using complex planarization equipment, the invention uses a simpler groove formation and filling approach to achieve the required flat surface quality, thereby reducing equipment complexity while maintaining manufacturing precision
Solution Approach 2:
The patent replaces expensive, complex planarization equipment with simpler, more accessible photolithography and etching tools. The groove filling material serves as a disposable element that provides the necessary planarization function temporarily during manufacturing, eliminating the need for costly planarization machinery
2Manufacturing precision
If planarization steps like chemical mechanical polishing are used, then flat surface quality is improved, but manufacturing cost increases
Solution Approach 1:
The patent removes the costly planarization step from the manufacturing process. By using groove formation and filling with standard photolithography and etching techniques, the invention achieves flat surface quality without incurring the high costs associated with chemical mechanical polishing equipment and materials
Solution Approach 2:
The invention uses inexpensive groove filling materials and standard photolithography processes to replace expensive planarization operations. The filling material serves its planarization purpose and can be removed or integrated into the final structure, providing a cost-effective alternative to traditional planarization
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the successful fabrication of high electron mobility transistors with high yield and quality, avoiding the need for expensive planarization equipment and ensuring flat surface formation for subsequent processes.
Implementation Method 1
A first patterned photoresist layer is formed on the aluminum gallium nitride layer, and a groove is formed in the gallium nitride layer and the aluminum gallium nitride layer
Implementation Method 2
a groove is formed in the gallium nitride layer and the aluminum gallium nitride layer
Data Source
AI summary
The present invention provides a method of forming an insulating structure of a high electron mobility transistor (HEMT), firstly, a gallium nitride layer is formed, next, an aluminum gallium nitride layer is formed on the gallium nitride layer, then, a first patterned photoresist layer is formed on the aluminum gallium nitride layer, and a groove is formed in the gallium nitride layer and the aluminum gallium nitride layer, next, an insulating layer is formed and filling up the groove. Afterwards, a second patterned photoresist layer is formed on the insulating layer, wherein the pattern of the first patterned photoresist layer is complementary to the pattern of the second patterned photoresist layer, and part of the insulating layer is removed, then, the second patterned photoresist layer is removed, and an etching step is performed on the remaining insulating layer to remove part of the insulating layer again.


