HEMT Structured Passivation for Low RDSON Without Gate Leakage
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Solution Overview
Problem
Current high-electron-mobility transistor (HEMT) devices face challenges in maintaining low dynamic on-state resistance (RDSON) while avoiding unfavorable trade-offs with static device parameters such as threshold voltage (Vth) and gate-source leakage current (IGSS).
Innovation Solution
The HEMT device incorporates a semiconductor body with a barrier region and a channel region forming a heterojunction, source and drain electrodes in low-ohmic contact with the two-dimensional charge carrier gas channel, a gate structure to control the conduction state, and passivation regions with different material compositions and geometries to modulate the density of the two-dimensional charge carrier gas channel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional passivation structures are used in HEMT devices, then device simplicity is maintained, but dynamic on-state resistance (RDSON) cannot be sufficiently reduced without adversely affecting threshold voltage (Vth) and gate-source leakage current (IGSS)
Solution Approach 1:
The patent implements a dual-passivation structure where a first passivation region with aluminum-containing dielectric material is positioned in the drain region to reduce sheet resistance and improve RDSON, while a second passivation region with different dielectric material covers the gate structure to maintain proper Vth and control IGSS. This local differentiation of passivation properties allows simultaneous optimization of both dynamic and static device parameters without compromise.
2Loss of energy
If the density of two-dimensional charge carrier gas channel is increased in the drain region to reduce sheet resistance, then power dissipation improves, but electric fields near the gate structure may increase causing enhanced gate leakage
Solution Approach 1:
The patent applies different passivation materials in different spatial regions: aluminum-containing dielectric in the drain region to enhance carrier density and reduce sheet resistance for improved power dissipation, while separate dielectric material over the gate structure to control electric fields and prevent gate leakage enhancement, achieving local optimization of competing requirements.
Solution Approach 2:
The passivation structure is segmented into distinct first and second passivation regions with different material compositions and geometries, allowing independent optimization of carrier density in the drain region versus electric field control near the gate, thereby resolving the contradiction between reducing power dissipation and preventing gate leakage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively lowers the sheet resistance of the two-dimensional charge carrier gas channel in the drain region without increasing electric fields near the gate structure or enhancing gate leakage, thereby improving power dissipation in switching applications.
Implementation Method 1
a semiconductor body comprising a barrier region of type III-V semiconductor material and a channel region of type III-V semiconductor material that forms a heterojunction with the barrier region such that a two-dimensional charge carrier gas channel is disposed in the channel region near the heterojunction
Implementation Method 2
This two-dimensional charge carrier gas provides the active device channel that accommodates the load current of the device. Due to the high mobility of carriers within the two-dimensional charge carrier gas, these devices offer very low on-resistance
Implementation Method 3
first dielectric region comprises a first end that faces and is laterally spaced apart from the gate structure... first and second passivation regions are arranged to influence the two-dimensional charge carrier gas such that a density of the two-dimensional charge carrier gas channel underneath an interface between the first passivation region and the semiconductor body is higher
Data Source
AI summary
A high-electron-mobility transistor comprises a semiconductor body comprising a barrier region and a channel region that forms a heterojunction with the barrier region such that a two-dimensional charge carrier gas channel is disposed in the channel region, source and drain electrodes disposed on the semiconductor body and laterally spaced apart from one another, a gate structure disposed on the semiconductor body and laterally between the source and drain electrodes, the gate structure being configured to control a conduction state of two-dimensional charge carrier gas, and a first dielectric region that is disposed along the upper surface of the semiconductor body in a lateral region that is between the gate structure and the drain electrode, wherein the first dielectric region comprises aluminum and oxide, and wherein first dielectric region comprises a first end that faces and is laterally spaced apart from the gate structure.