HEMT Seed Layer Discharge Structure for Charge Accumulation

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Solution Overview

Problem

High electron mobility transistors (HEMTs) face issues with excessive charge accumulation in the seed layer, affecting device operation, particularly due to material characteristics, leading to large current and high voltage challenges.

Innovation Solution

A semiconductor device and method involving a substrate with a seed layer, compound semiconductor stack layer, and metal layers, where a conductive layer is conformally deposited to cover the metal layers and side surfaces, electrically connecting the seed layer and source/drain metal layers, and a dicing process is performed to form openings for charge discharge, reducing resistance and enhancing operation speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional HEMT structure is used, then the device can operate in high-temperature and high-voltage environments, but excessive charges accumulate in the seed layer affecting normal operation

Engineering Contradiction:
Improvedevice operation stabilityVSAvoidcharge accumulation in seed layer
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent extracts the harmful accumulated charges from the seed layer by creating a conductive layer that extends into the substrate, forming a charge discharge path that removes excess charges from the seed layer region

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The conductive layer acts as an intermediary element between the seed layer and the substrate, providing a controlled path for charge discharge and preventing direct harmful interactions between accumulated charges and the active device regions

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If the seed layer is present for material growth, then compound semiconductor layers can be formed, but charge accumulation occurs in the seed layer

Engineering Contradiction:
Improvecompound semiconductor layer formationVSAvoidcharge accumulation
Core Design Contradiction:
Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The patent segments the device structure by creating a conductive layer that is spatially separated from the active HEMT regions but connected to the seed layer, allowing the seed layer to fulfill its manufacturing function while isolating its harmful charge accumulation effect

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent converts the harmful charge accumulation in the seed layer into a beneficial feature by providing a controlled discharge path, where the accumulated charges are systematically removed through the conductive layer extending into the substrate, transforming a manufacturing necessity into a functional advantage

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Reliability

If metal layers are deposited for source and drain contacts, then electrical connection is established, but device resistance remains high due to charge accumulation

Engineering Contradiction:
Improveelectrical connectionVSAvoidhigh device resistance
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent adds a vertical dimension to the charge discharge path by extending the conductive layer into the substrate beneath the metal layers, creating a three-dimensional charge management structure that complements the planar metal contact configuration

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively addresses charge accumulation by electrically connecting the seed layer with the metal layers, reducing device resistance and improving operational speed, thus enhancing the performance of HEMTs in high-temperature, high-voltage environments.

Implementation Method 1

conformally depositing a conductive layer on a bottom and sidewalls of the dicing opening, and covering the source metal layer and the drain metal layer

Methodology Applied
Scientific EffectConformal deposition: Deposition (physical)

Implementation Method 2

The conductive layer electrically connects the seed layer and the source metal layer

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS20250022766A1Semiconductor device
Publication Date: 2025.01.16 VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
  • US20250022766A1 patent drawing
  • US20250022766A1 patent drawing
  • US20250022766A1 patent drawing

AI summary

A semiconductor device includes: a substrate; a seed layer disposed on the substrate; a compound semiconductor stack layer disposed on the seed layer; and a source metal layer and a drain metal layer disposed on the compound semiconductor stack layer. The semiconductor device further includes a conductive layer at least partially covering the source metal layer and the drain metal layer, and covering opposing side surfaces of the seed layer and opposing side surfaces of the compound semiconductor stack layer. The conductive layer electrically connects the seed layer and the source metal layer.