HEMT Gate Leakage Reduction via Segmented Barrier

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Solution Overview

Problem

Existing transistors, such as JFETs and MESFETs, face challenges in operating at cryogenic temperatures with low noise and high impedance, while HEMTs exhibit high noise levels at low frequencies and significant gate leakage current, making them unsuitable for cryogenic applications with optimal performance.

Innovation Solution

A semiconductor heterostructure with specific barrier and spacer layers made of Al x Ga 1-x As materials, having varying aluminum content, is used to create a HEMT transistor with reduced gate leakage current and noise level, capable of operating at cryogenic temperatures. The heterostructure includes a substrate, buffer, spacer, and barrier layers with doping, where the second barrier sub-layer has a higher aluminum content than the first, and the spacer layers have a wider band gap than conventional devices, minimizing electron trapping and noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If HEMT is used for cryogenic applications, then operation capability at low temperature is improved, but noise level increases and gate leakage current increases

Engineering Contradiction:
Improveoperation temperature rangeVSAvoidnoise level and gate leakage current
Core Design Contradiction:
TemperatureVSObject-generated harmful factors

Solution Approach 1:

The barrier layer is divided into two sub-layers with different aluminum contents. The first barrier sub-layer (Al0.18Ga0.82As to Al0.33Ga0.67As) provides electron confinement, while the second barrier sub-layer (Al0.38Ga0.62As to Al0.5Ga0.5As) with higher aluminum content reduces gate leakage current and noise by creating a wider potential barrier that prevents electron tunneling and reduces thermal emission.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the barrier layer are assigned different aluminum compositions optimized for their specific functions. The spacer layer uses Al0.18Ga0.82As to Al0.33Ga0.67As for maintaining high electron mobility, while the barrier layer transitions to higher aluminum content (Al0.38Ga0.62As to Al0.5Ga0.5As) specifically where needed to reduce gate leakage and noise, achieving local optimization of material properties.

Inventive Principle:
Principle #3Local quality

2Object-generated harmful factors

If JFET is used for low frequency low noise applications, then noise level is reduced, but operation capability at cryogenic temperatures deteriorates

Engineering Contradiction:
Improvenoise levelVSAvoidcryogenic operation capability
Core Design Contradiction:
Object-generated harmful factorsVSTemperature

Solution Approach 1:

The invention changes the material parameters by using AlGaAs heterostructure with graded aluminum composition instead of uniform silicon. The gradual increase in aluminum content from 0.18 to 0.5 creates optimized potential wells and barriers that maintain low noise performance while enabling stable operation at cryogenic temperatures down to 4.2K, overcoming the temperature limitations of silicon JFETs.

Inventive Principle:
Principle #35Parameter changes

3Object-generated harmful factors

If higher aluminum content is used in barrier layer to reduce gate leakage current, then gate leakage current is reduced, but manufacturing complexity increases

Engineering Contradiction:
Improvegate leakage currentVSAvoidheterostructure complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The barrier layer is segmented into two distinct sub-layers with different aluminum compositions and thicknesses. This segmentation allows each sub-layer to be optimized independently: the first sub-layer for electron confinement with lower aluminum content, and the second sub-layer for gate leakage reduction with higher aluminum content, achieving multiple functions through structured division.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Higher aluminum content (0.38 to 0.5) is applied locally in the second barrier sub-layer specifically where gate leakage control is needed, while the first barrier sub-layer maintains lower aluminum content (0.18 to 0.33) for optimal electron mobility. This local quality differentiation achieves gate leakage reduction without uniformly increasing device complexity throughout the entire structure.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The resulting HEMT transistor achieves low noise levels comparable to silicon JFETs, with gate leakage current below 0.1 pA and equivalent input noise level of 0.9 nV/√Hz at 1 kHz, suitable for cryogenic temperatures, and maintains performance across a wide range of frequencies.

Implementation Method 1

The electrons in the gas are spaced from the donors from which they come by a layer of semiconductor material with a wide forbidden band, which gives them high mobility. They are in a degenerate state, and their behavior is almost independent of temperature.

Methodology Applied
Scientific EffectQuantum confinement: Potential Well

Implementation Method 2

said barrier and spacer layers are made of one or more semiconductor materials having a wider forbidden band than the material or materials constituting said buffer layer; the heterostructure being characterized in that: said barrier layer comprises a first barrier sub-layer, in contact with said spacer layer, and a second barrier sub-layer, remote from said spacer layer; and in that said second barrier sub-layer has a wider forbidden band than said first barrier sub-layer

Methodology Applied
Scientific EffectBand gap engineering:

Data Source

PatentEP2628185B1Semiconductor heterostructure and transistor of HEMT type, in particular for low-frequency low-noise cryogenic applications.
Publication Date: 2015.05.27 CENT NAT DE LA RECH SCI (C N R S)
  • EP2628185B1 patent drawingFigure 1~3
  • EP2628185B1 patent drawingFigure 4A~5

AI summary

The invention relates to a semiconductor heterostructure comprising: a substrate (SS); a buffer layer (h); a spacer layer (d, e, f); a barrier layer (b, c); and also preferably a cover layer (a), in which: the barrier layer is doped (DS); and said barrier and spacer layers are made of one or more semiconductors having wider bandgaps than the one or more materials forming said buffer layer, the heterostructure being characterized in that: said barrier layer comprises a first barrier sublayer (c) in contact with said spacer layer, and a second barrier sublayer (b), distant from said spacer layer; and in that said second barrier sublayer has a wider bandgap than said first barrier sublayer. The invention also relates to a HEMT transistor produced using such a heterostructure and to the use of such a transistor at cryogenic temperatures.