HEMT Field Plate Segmentation for Breakdown Voltage and Low Delay

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Solution Overview

Problem

Conventional high electron mobility transistors (HEMTs) experience increased capacitance and turn-on/off delay times due to the additional capacitance caused by the field plate, which reduces their electrical performance.

Innovation Solution

The design includes a substrate with a semiconductor channel and barrier layer, a gate field plate, a first field plate laterally spaced apart from the gate field plate, and a second field plate that covers both, with the second field plate being electrically connected to the source electrode and having a larger area than the sum of the gate and first field plates, along with a conformal interlayer dielectric layer to manage the electric field distribution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a field plate is added to improve breakdown voltage, then the withstand voltage capability is improved, but the capacitance increases causing turn-on/off delay

Engineering Contradiction:
Improvebreakdown voltageVSAvoidturn-on/off delay time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The field plate is divided into multiple segments (first field plate, second field plate, third field plate) spaced apart from each other. This segmentation reduces the total capacitance compared to a single continuous field plate, while still providing sufficient electric field control to maintain breakdown voltage protection.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The field plates are arranged in a spatial distribution pattern (laterally spaced apart) rather than as a single planar element. This dimensional arrangement reduces overlapping area and thus capacitance, while the extended spatial coverage maintains the electric field management function for breakdown voltage protection.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If the field plate area is increased to improve breakdown voltage, then the withstand voltage capability is improved, but the capacitance increases

Engineering Contradiction:
Improvebreakdown voltageVSAvoidcapacitance
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The field plate structure is segmented into multiple smaller plates spaced apart, which reduces the total effective capacitance area while maintaining the protective function across the device surface.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of using a single large field plate that provides excessive coverage and capacitance, the invention uses multiple smaller field plates that provide just sufficient coverage to maintain breakdown voltage without unnecessary capacitance increase.

Inventive Principle:
Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration maintains the breakdown voltage of HEMTs while avoiding the increase in capacitance and turn-on/off delay times, enhancing their electrical performance.

Implementation Method 1

a conformal interlayer dielectric layer to manage the electric field distribution

Methodology Applied
Scientific EffectElectric field distribution: Electric Field

Implementation Method 2

this manner usually produces an additional capacitance

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS20240413236A1Method of fabricating high electron mobility transistor
Publication Date: 2024.12.12 VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
  • US20240413236A1 patent drawing
  • US20240413236A1 patent drawing
  • US20240413236A1 patent drawing

AI summary

A high electron mobility transistor includes a substrate, a semiconductor channel layer, a semiconductor barrier layer, a gate field plate, a source electrode, at least one first field plate, and a second field plate. The gate field plate is disposed on the semiconductor barrier layer. The source electrode is disposed on one side of the gate field plate, and the first field plate is disposed on the other side of the gate field plate and laterally spaced apart from the gate field plate. The second field plate covers the gate field plate and the first field plate and is electrically connected to the source electrode, where the area of the second field plate is larger than the sum of the area of the gate field plate and the area of the first field plate when perceived from a top-down perspective.