Group III-Nitride HEMT Buffer Breakdown via Substrate P-N Junction

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Solution Overview

Problem

Conventional Group III-N HEMTs with thin buffer layers have low breakdown voltage, and floating substrates cause crosstalk and thermal conductivity issues due to non-conductive epoxies, necessitating alternative approaches for increasing breakdown voltage and improving thermal management.

Innovation Solution

Forming a p-n junction in a silicon substrate under the drain to create a junction isolation barrier that increases buffer breakdown voltage, allowing for a grounded substrate and the use of conductive epoxies for better thermal conductivity, while maintaining a thin buffer layer thickness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a thin buffer layer is used, then manufacturing cost is reduced and stress bowing is minimized, but breakdown voltage decreases

Engineering Contradiction:
Improvebuffer layer thicknessVSAvoidbreakdown voltage
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The substrate is segmented into a first substrate region and a second substrate region. The first substrate region supports the thin buffer layer structure, while the second substrate region is removed to form a recess that exposes the high-breakdown-voltage substrate material. This segmentation allows the device to utilize the advantages of both thin buffer layers (low stress, easy manufacturing) and thick substrate (high breakdown voltage) by spatially separating their functions.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the substrate is floated to double breakdown voltage, then breakdown voltage increases, but crosstalk and thermal management issues occur

Engineering Contradiction:
Improvebreakdown voltageVSAvoidcrosstalk and thermal conductivity
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The substrate is treated with different electrical properties in different regions. The first substrate region maintains electrical connection for thermal management and grounding, while the second substrate region is removed to eliminate capacitive coupling paths. This local differentiation allows the device to achieve high breakdown voltage without the harmful effects of floating substrates, as the grounded first substrate region provides a reference potential that reduces crosstalk while enabling effective heat sinking.

Inventive Principle:
Principle #3Local quality

3Area of stationary object

If substrate size is increased, then device performance is improved, but stress bowing increases

Engineering Contradiction:
Improvesubstrate sizeVSAvoidstress bowing
Core Design Contradiction:
Area of stationary objectVSStability of the object's composition

Solution Approach 1:

The substrate area is segmented into functional regions where the first substrate region provides mechanical support and thermal management, while the second substrate region is selectively removed. This segmentation strategy allows large substrate areas to be utilized for device performance without experiencing uniform stress bowing across the entire substrate, as the recess structure redistributes and manages the stress distribution.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The p-n junction significantly increases buffer breakdown voltage, reduces crosstalk, and enables the use of conductive epoxies for improved thermal management in Group III-N HEMTs, addressing the limitations of thin buffer layers and floating substrates.

Implementation Method 1

forming a p-n junction in a silicon substrate under the drain to create a junction isolation barrier that increases buffer breakdown voltage

Methodology Applied
Scientific EffectDepletion region:

Data Source

PatentUS8502273B2Group III-nitride HEMT having a well region formed on the surface of substrate and contacted the buffer layer to increase breakdown voltage and the method for forming the same
Publication Date: 2013.08.06 NAT SEMICON CORP
  • US8502273B2 patent drawing
  • US8502273B2 patent drawing
  • US8502273B2 patent drawing

AI summary

The buffer breakdown of a group III-N HEMT on a p-type Si substrate is significantly increased by forming an n-well in the p-type Si substrate to lie directly below the metal drain region of the group III-N HEMT. The n-well forms a p-n junction which becomes reverse biased during breakdown, thereby increasing the buffer breakdown by the reverse-biased breakdown voltage of the p-n junction and allowing the substrate to be grounded. The buffer layer of a group III-N HEMT can also be implanted with n-type and p-type dopants which are aligned with the p-n junction to minimize any leakage currents at the junction between the substrate and the buffer layer.