HEMT Interconnect via Substrate Vias for Thermal Management

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Solution Overview

Problem

High frequency and power semiconductor devices, such as multiple gate-finger HEMTs, face challenges in thermal management due to heat generation in small areas, particularly near the gate, and existing methods like airbridges result in bulky devices with high thermal resistance.

Innovation Solution

A method involving a first substrate with semiconductor stacks and gate contacts between source and drain ohmic contacts, where vias are etched through the substrate to directly expose and connect ohmic contacts, eliminating the need for airbridges and allowing for a more compact, planar device with improved heat dissipation by using a thermally conductive adhesive layer and heat spreading layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If airbridge structures are used to connect neighbouring contacts in multiple gate-finger HEMTs, then the device can be produced using established methods, but the device height increases and thermal resistance increases

Engineering Contradiction:
ImprovemanufacturabilityVSAvoiddevice height
Core Design Contradiction:
Ease of manufactureVSLength of stationary object

Solution Approach 1:

The patent extracts and removes the airbridge structure from the device architecture. Instead of using airbridges to connect neighbouring contacts, the invention directly contacts the contacts through vias etched through the substrate, eliminating the intermediate airbridge component and reducing device height.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent transitions from a lateral connection approach (airbridges connecting contacts horizontally) to a vertical connection approach (via holes penetrating the substrate to contact contacts directly). This dimensional change from lateral to vertical connectivity reduces the horizontal footprint and device height.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If airbridge structures are used to connect neighbouring contacts, then the device can be produced using established methods, but thermal resistance increases and heat dissipation is reduced

Engineering Contradiction:
ImprovemanufacturabilityVSAvoidthermal management
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The airbridge structure, which acts as a thermal barrier, is completely removed from the device. The patent replaces it with direct substrate contact through vias, creating a low thermal resistance path from the heat-generating channel region to the substrate for effective heat dissipation.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The substrate itself acts as the intermediary for both electrical connection and thermal management. By etching vias through the substrate to directly contact the source/drain regions, the substrate serves as a dual-function mediator for electrical connectivity and heat sinking, eliminating the need for separate airbridge structures.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Length of stationary object

If vias are etched through the substrate to directly expose ohmic contacts, then device height is reduced and thermal resistance is reduced, but the manufacturing process becomes more complex

Engineering Contradiction:
Improvedevice heightVSAvoidmanufacturing process complexity
Core Design Contradiction:
Length of stationary objectVSDevice complexity

Solution Approach 1:

The manufacturing process is segmented into distinct stages: first forming the semiconductor structures and contacts on the substrate, then etching via holes through the substrate to expose specific contacts, and finally applying contact pads. This segmentation allows each step to be optimized independently and simplifies the overall process control.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The ohmic contacts are formed and positioned on the substrate before the via etching step. This preliminary action allows the contacts to be fully formed and the substrate to be prepared in advance, so that when vias are etched, the contacts are already in their final positions, simplifying the subsequent contact pad formation.

Inventive Principle:
Principle #10Preliminary action

4Reliability

If vias are etched through the substrate to directly expose ohmic contacts, then thermal resistance is reduced and heat dissipation is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvethermal managementVSAvoidvia etching precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The via etching process is applied locally at specific positions where contacts need to be exposed, rather than uniformly across the entire substrate. The etch pattern is designed to match the contact layout, creating via holes only where needed to expose source/drain contacts while leaving other areas intact. This localized approach reduces the overall precision burden compared to uniform high-precision requirements.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in a more compact, highly integrated semiconductor device with reduced thermal resistance, shorter electrical connections, and enhanced RF behavior, facilitating further packaging and integration while maintaining effective heat dissipation both vertically and laterally.

Implementation Method 1

using a thermally conductive adhesive layer and heat spreading layer

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

using a thermally conductive adhesive layer and heat spreading layer

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS7442635B2Method for producing a semiconductor device and resulting device
Publication Date: 2008.10.28 INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW)
  • US7442635B2 patent drawing
  • US7442635B2 patent drawing
  • US7442635B2 patent drawing

AI summary

The present invention is related to a method of producing a semiconductor device and the resulting device. The method is suitable in the first place for producing high power devices, such as High Electron Mobility Transistors (HEMT), in particular HEMT-devices with multiples source-gate-drain groups or multiple base bipolar transistors. According to the method, the interconnect between the source contacts is not produced by air bridge structures, but by etching vias through the semiconductor layer directly to the ohmic contacts and applying a contact layer on the backside of the device.