III-Nitride HEMT Gate-Connected Field Plate Miller Capacitance
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Solution Overview
Problem
III-Nitride HEMT devices with gate-connected field plates suffer from increased capacitance between the gate and drain electrodes, leading to reduced high-frequency response due to the Miller capacitance effect, while devices with source-connected field plates have more complex manufacturing processes.
Innovation Solution
A III-N HEMT design featuring a gate-connected field plate electrically connected to ground, minimizing capacitance between the input and output by keeping the field plate voltage constant, thus avoiding the Miller effect and simplifying the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a gate-connected field plate is used, then the manufacturing process is simplified, but the capacitance between gate and drain increases causing reduced high-frequency response
Solution Approach 1:
The field plate is segmented into multiple sections: a first field plate section connected to gate, a second field plate section connected to drain, and an intermediate section floating between them. This segmentation allows different portions of the field plate to serve different functions - the first section provides field shaping near the gate, the second section reduces capacitance to drain, and the intermediate section isolates the high-capacitance region, thereby resolving the contradiction between manufacturing simplicity and high-frequency performance
Solution Approach 2:
An intermediate field plate section is introduced as a mediator between the gate-connected and drain-connected sections. This intermediate section acts as an electrical buffer that reduces the direct capacitive coupling between gate and drain while maintaining the field-shaping benefits of the gate-connected configuration. The intermediate section can be left floating or weakly connected, providing isolation that preserves high-frequency response without sacrificing manufacturing simplicity
2Speed
If a source-connected field plate is used, then the Miller effect is reduced, but the manufacturing process becomes more complex
Solution Approach 1:
The invention merges the advantages of both gate-connected and source-connected field plates by combining them into a single unified structure. The field plate is connected to both gate and drain at different sections, effectively merging the field-shaping capability of gate-connected plates with the low-capacitance benefit of drain-connected plates. This merged configuration achieves Miller effect reduction without requiring separate fabrication steps for source-connected plates
3Shape
If the field plate voltage is allowed to vary with input signal, then field shaping is optimized, but capacitance between input and output increases
Solution Approach 1:
Different sections of the field plate are assigned different electrical characteristics: the first field plate section near the gate is connected to gate voltage to optimize local field shaping, the intermediate section is left floating or weakly connected to minimize capacitive coupling, and the second section near the drain is connected to drain voltage to reduce output capacitance. This local differentiation allows each region to optimize its function, resolving the contradiction between field shaping and capacitance reduction
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design minimizes input-output capacitance, maintains high-frequency response, and simplifies the manufacturing process by eliminating the need for separate field plate and gate electrode layers, enabling efficient high-voltage operation.
Implementation Method 1
Field plates are commonly used in III-N devices to shape the electric field in the high-field region of the device in such a way that reduces the peak field and increases the device breakdown voltage
Implementation Method 2
a field plate electrically connected to the gate electrode and separated from the III-N layers by an electrical insulator
Implementation Method 3
A two-dimensional electron gas (2DEG) channel 19 is induced in the channel layer 11 near the interface between the channel layer 11 and the barrier layer 12
Implementation Method 4
Gate electrode 16 modulates the portion of the 2DEG in the gate region, i.e., directly beneath gate electrode 16
Data Source
AI summary
A III-nitride based high electron mobility transistor is described that has a gate-connected grounded field plate. The gate-connected grounded field plate device can minimize the Miller capacitance effect. The transistor can be formed as a high voltage depletion mode transistor and can be used in combination with a low voltage enhancement-mode transistor to form an assembly that operates as a single high voltage enhancement mode transistor.