Ultra-thin Hermetic Microelectronic Package Using Bonded Metallic Wall and Lid

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Solution Overview

Problem

Current microelectronic packages lack a compact, thin, and substantially hermetic design, which is necessary for efficient thermal management and electrical connectivity in semiconductor chip packaging.

Innovation Solution

A microelectronic package is created using a dielectric layer with exposed terminals, a metallic wall projecting from the top surface, and a bonded metallic lid that encloses the microelectronic element, providing a hermetic or near-hermetic seal. The package is manufactured by etching a composite metallic plate to form conductive elements and walls, which are then united with a dielectric layer to create a compact, thin structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional microelectronic packages are used, then manufacturing and mounting are straightforward, but the packages are too thick and lack hermetic sealing, resulting in poor thermal management and electrical connectivity

Engineering Contradiction:
Improvehermetic sealingVSAvoidpackage thickness
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The package is segmented into distinct functional layers: a flexible substrate layer for electrical connections, a support element layer for mechanical stability, and a hermetic enclosure layer for sealing. This segmentation allows each layer to be optimized independently, achieving hermetic sealing without excessive thickness

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The microelectronic chip is nested within the flexible substrate, which is in turn nested within the hermetic enclosure formed by the support elements and sealing structure. This nested arrangement maximizes space utilization and achieves compact packaging with improved hermeticity

Inventive Principle:
Principle #7Nested doll (Nesting)

2Temperature

If conventional packages are used, then handling during manufacture is easy, but thermal resistance is high, reducing efficiency

Engineering Contradiction:
Improvethermal resistanceVSAvoidhandling during manufacture
Core Design Contradiction:
TemperatureVSEase of manufacture

Solution Approach 1:

The support elements are formed with curved or domed surfaces that provide both mechanical support and optimized thermal pathways. The curved geometry allows for better heat dissipation while maintaining ease of manufacturing through standard molding or forming processes

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The package utilizes composite construction with the flexible substrate providing electrical connectivity and the support elements providing mechanical and thermal management. This composite approach optimizes thermal resistance while maintaining manufacturability

Inventive Principle:
Principle #40Composite materials

3Reliability

If conventional packages are used, then electrical connection is achieved, but electrical resistance is high, reducing performance

Engineering Contradiction:
Improveelectrical connectivityVSAvoidpackage structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The flexible substrate serves multiple functions: it provides electrical connectivity through conductive traces, mechanical support for the chip, and a platform for the hermetic sealing structure. This multi-functionality reduces overall package complexity while improving electrical connectivity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The electrical connection elements (conductive posts and traces) are merged with the flexible substrate structure, eliminating the need for separate connection components. This integration reduces electrical resistance while simplifying the overall package structure

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution results in a compact, thin, and hermetically sealed package with low thermal resistance and electrical resistance, enhancing the reliability and performance of semiconductor chip packaging by maintaining a low helium leak rate and allowing for independent movement of terminals, thus facilitating better connectivity and thermal management.

Implementation Method 1

a metallic wall bonded to the dielectric layer and projecting upwardly from the top surface of the dielectric layer and surrounding a region of the top surface, a metallic lid bonded to the wall and extending over the region of the top surface so that the lid, the wall and the dielectric layer cooperatively define an enclosed space

Methodology Applied
Scientific EffectHermetic sealing:

Implementation Method 2

The solution results in a compact, thin, and hermetically sealed package with low thermal resistance and electrical resistance

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 3

a composite metallic plate including a base layer of a metal and a conductive layer; etching the base layer to form a wall; and etching the conductive layer to separate the conductive layer into individual conductive elements

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS8508036B2Ultra-thin near-hermetic package based on rainier
Publication Date: 2013.08.13 ADEIA SEMICONDUCTOR SOLUTIONS LLC
  • US8508036B2 patent drawing
  • US8508036B2 patent drawing
  • US8508036B2 patent drawing

AI summary

A microelectronic package including a dielectric layer having top and bottom surfaces, the dielectric layer having terminals exposed at the bottom surface; a metallic wall bonded to the dielectric layer and projecting upwardly from the top surface of the dielectric layer and surrounding a region of the top surface; a metallic lid bonded to the wall and extending over the region of the top surface so that the lid, the wall and the dielectric layer cooperatively define an enclosed space; and a microelectronic element disposed within the space and electrically connected to the terminals.