Heterogeneous Multi-Chiplet Task Assignment for Data Locality
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Solution Overview
Problem
Conventional GPUs face inefficiencies in task assignment due to the limitations of central processing chiplets (CPCs) in handling advanced tasks like machine learning, leading to increased off-chiplet remote data access and higher energy consumption.
Innovation Solution
Implementing a heterogeneous multi-chiplet processor with advanced processing chiplets (APCs) and CPCs that share a single pool of virtual and physical memory, and using a scheduler to optimize task assignment by minimizing off-chiplet data access through strategic task distribution across APCs and CPCs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional GPUs use central processing chiplets (CPCs) for task assignment, then the system structure is simple, but the performance for advanced tasks like machine learning deteriorates and energy consumption increases
Solution Approach 1:
The processor is segmented into different types of chiplets: CPCs for general tasks and APCs for advanced tasks. This segmentation allows each chiplet type to be optimized for its specific function, improving overall productivity while managing energy consumption by assigning tasks to the most appropriate chiplet.
Solution Approach 2:
Different chiplets have different qualities specialized for different task types. APCs are equipped with specific hardware accelerators for machine learning and advanced computing, while CPCs handle general-purpose tasks. This local quality optimization ensures that energy is consumed efficiently by matching task requirements with appropriate chiplet capabilities.
2Loss of time
If tasks are assigned without optimization, then the task assignment process is simple, but off-chiplet remote data access increases leading to higher latency
Solution Approach 1:
The scheduler performs preliminary analysis of tasks and their data requirements before assignment. It determines in advance which chiplets should execute which tasks based on data locality, ensuring that data is accessed from the most appropriate location and minimizing remote data access latency.
Solution Approach 2:
The scheduler uses feedback mechanisms to monitor data access patterns and task execution performance. This feedback information is used to optimize future task assignments, continuously improving data access efficiency and reducing latency without significantly increasing system complexity.
Data Source
AI summary
Efficient task assignment is provided in heterogeneous multi-chiplet processors including one or more advanced processing chiplets (APCs) and one or more central processing chiplets (CPCs). A graphics processing unit (GPU) assigns data for use by one or more tasks to memories associated with a plurality of APCs and one or more CPCs. A scheduler or other controller within or otherwise associated with the GPU assigns tasks, which utilize the assigned data, to the APCs and one or more CPCs as appropriate. The scheduler is configured to assign the tasks to the plurality of APCs such that at least one task associated with data assigned to the at least one CPC is assigned to at least one of the plurality of APCs and optimizes correspondence between data associated with the tasks that is assigned to memories associated with the plurality of APCs and the tasks assigned to the plurality of APCs.