Heterogeneous Processor Compiler Code Segmentation
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Solution Overview
Problem
Designing program code and instructions that effectively utilize heterogeneous processors, which have different configurations and attributes, poses a challenge as existing compilers optimize for single processors, leading to inefficient operation in systems with multiple specialized processors.
Innovation Solution
A method implemented by a processor to generate compiler output that maps operations onto heterogeneous processors based on library information and attributes, dividing program code into sub-portions corresponding to specific processors for parallel processing, ensuring each processor operates efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If existing compilers optimize for single processors, then compilation simplicity is maintained, but processing efficiency deteriorates in heterogeneous processor systems
Solution Approach 1:
The patent divides the program code into multiple sub-portions, each corresponding to specific heterogeneous processors. The compiler segments the compilation task by creating separate compilation units that can be independently optimized for different processor types (CPU, GPU, NPU, etc.), thereby improving processing efficiency without requiring complete redesign of the entire compilation system
Solution Approach 2:
The patent creates a universal compiler framework that can handle multiple heterogeneous processor types through a common interface. The compiler is designed to work with various processor architectures by using standardized library information and attribute descriptions, allowing a single compiler to serve multiple processor types without sacrificing optimization capabilities
2Productivity
If program code is designed for specific processor configurations, then processing performance is optimized, but adaptability to different processor types deteriorates
Solution Approach 1:
The patent uses library information and attributes as parameter descriptions that define processor-specific characteristics. By changing these parameters based on the target processor type, the compiler can generate optimized code for different processor configurations without requiring separate compilation systems. The same program code can be compiled for CPU, GPU, or NPU by simply changing the processor parameters in the library information
3Productivity
If heterogeneous processors with different configurations are used, then processing capability is enhanced, but code mapping complexity increases
Solution Approach 1:
The patent introduces library information and attributes as intermediary data structures that bridge the gap between high-level program code and processor-specific implementations. These intermediaries contain standardized descriptions of processor capabilities, memory configurations, and operation characteristics, allowing the compiler to automatically map operations to appropriate processors without manual intervention or complex configuration
Data Source
AI summary
A method which is implemented by a processor of an electronic device includes receiving a program code directing operations to be processed by heterogeneous processors, receiving libraries to be referenced by the heterogeneous processors for processing the operations, receiving library information associated with attributes of processing the operations based on the libraries, determining processors, which will process the operations, from heterogeneous processors with reference to the library information such that each processor of the heterogeneous processors processes one or more assigned operations of the operations, and compiling sub portions divided from a whole portion of the program code so as to respectively correspond to the determined processors in a state where the sub portions respectively correspond to some libraries to be referenced by the determined processors.