Heterogeneous Delay Line TDC for Uniform Time Resolution
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Solution Overview
Problem
Conventional delay line-based time-digital converters face issues with non-uniform delay times due to the use of identical delay elements, leading to increased time quantization errors and insufficient time resolution.
Innovation Solution
The implementation of a delay line-based time-digital converter with a combination of first and second delay elements, where the plurality of first delay elements and second delay elements are different, and a multiplexer unit to select outputs from these elements, ensuring uniform delay times and improved time resolution by configuring the delay line with logic elements such as buffers, gates, inverters, or multiplexers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If identical delay elements are used in the delay line, then the device complexity is reduced, but the measurement precision deteriorates due to non-uniform delay times and increased time quantization errors
Solution Approach 1:
The patent applies local quality by using different types of delay elements (first delay elements and second delay elements with different delay times) at different positions in the delay line. This allows each position to have optimized delay characteristics, achieving uniform overall delay times and reducing time quantization errors while maintaining measurement precision.
Solution Approach 2:
The patent uses composite materials concept by combining different types of delay elements (first and second delay elements) in the delay line. This composite structure of heterogeneous delay elements creates uniform delay characteristics that reduce time quantization errors and improve time resolution without excessive complexity.
2Measurement precision
If the delay line is configured with multiple different delay elements, then the time resolution is improved, but the device complexity increases
Solution Approach 1:
The patent segments the delay line into multiple stages, each containing different types of delay elements (first and second delay elements). This segmentation allows independent optimization of each stage's delay characteristics while maintaining overall uniformity, improving time resolution without proportionally increasing complexity.
Solution Approach 2:
The patent changes the delay time parameter of delay elements at different positions in the delay line. By assigning different delay times (t1, t2, t3, t4) to different elements strategically, the system achieves uniform overall delay and reduced quantization errors while managing complexity through parameter optimization rather than structural complexity.
3Loss of time
If the delay time of the delay line is long, then the time measurement range is extended, but the time quantization error increases and time resolution deteriorates
Solution Approach 1:
The patent applies local quality by varying delay times at different positions in the delay line. This localized optimization ensures that even as the total delay time increases to extend measurement range, the distributed delay elements maintain uniform characteristics that prevent time quantization errors from accumulating, thereby preserving time resolution.
Data Source
AI summary
A delay line-based time to digital converter includes: a coarse counter for counting a pulse of a timing clock and measuring a time when an edge of an input signal is detected; a fine time interpolator including a plurality of first delay elements and a plurality of second delay elements, a delay line with the input signal as an input, and a flip-flop unit with outputs of the first delay element or outputs of the second delay elements as inputs and the timing clock as an operation frequency; and a timestamp generator for receiving a digital value on a time measured by the coarse counter and the fine time interpolator, and generating a timestamp on the input signal by using the received digital value.