Heterogeneous Parallel Systems for Grid Simulation Acceleration

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Solution Overview

Problem

Current systems for executing computationally intensive physics simulations, such as those in Computational Fluid Dynamics, face limitations in processing speed and grid size due to communication overhead and limited acceleration capabilities, especially when dealing with large datasets represented as grids with tens or hundreds of millions of vertices.

Innovation Solution

A system comprising multiple computing nodes with both CPU-based and FPGA-based processing means, interconnected by high-speed networks, that partition and distribute the grid into sub-grids for parallel processing, with separate solver processes executing on each type of processor to minimize communication bottlenecks and optimize hardware performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the grid is partitioned into more sub-grids for parallel processing, then the computation speed increases, but the communication overhead increases until the acceleration becomes marginal

Engineering Contradiction:
Improvecomputation speedVSAvoidcommunication overhead
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies segmentation by dividing the computational domain into sub-grids that are processed in parallel by multiple solver processes. Each solver process handles a specific sub-grid, allowing computations to be distributed across multiple processing units. This segmentation enables the system to achieve linear scaling of computation speed with the number of processors, while minimizing communication overhead by optimizing the partitioning strategy.

Inventive Principle:
Principle #1Segmentation

2Productivity

If accelerator devices are added to improve execution time, then the computation speed increases, but the number of available accelerator devices is limited

Engineering Contradiction:
Improveexecution timeVSAvoidnumber of accelerator devices
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements universality by creating a hybrid computing architecture where CPU-based solver processes and FPGA-based solver processes can coexist and interoperate within the same parallel computing system. The system can dynamically allocate workloads between different types of processing units based on their respective strengths, allowing the same software framework to utilize both general-purpose CPUs and specialized FPGAs without requiring separate systems.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of manufacture

If only part of the algorithm is executed in accelerator devices, then the implementation is simpler, but communication overload increases and performance is reduced

Engineering Contradiction:
Improveimplementation simplicityVSAvoidperformance
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The patent applies the extraction principle by removing the communication overhead from the critical computation path. The FPGA-based solver processes execute the complete algorithm independently, performing all necessary computations and data exchanges within the accelerated hardware. Only the final results need to be transferred back to the CPU, dramatically reducing communication overhead compared to hybrid approaches where data must be frequently exchanged between CPU and FPGA memory spaces.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentEP2608084B1Heterogeneous parallel systems for accelerating simulations based on discrete grid numerical methods
Publication Date: 2015.03.18 AIRBUS OPERATIONS SL
  • EP2608084B1 patent drawingFigure 1~2
  • EP2608084B1 patent drawingFigure 3~4
  • EP2608084B1 patent drawingFigure 5

AI summary

A system for executing a given scientific code using a suitable finite-volume or finite-element solver for a large dataset represented as a grid, comprising a plurality of equal computing nodes (1) interconnected by node communication means (3, 4, 5) and a parallel computing software package for distributing and controlling the execution in sub-grids among said computing nodes (1); each computing node (1) comprising at least a CPU-based first processing means (11) and a FPGA-based second processing means (12) interconnected by a bus (23, 24); said package being configured for the simultaneous execution of at least one first solver process (which is fully executed in a first processing means) and one second solver process (which is fully executed in a second processing means) in each computing node (1) for one sub-grid of said grid and for managing the exchange of boundary data with the solver processes that solve neighbour sub-grids.