Heterogeneous Processor Memory Sharing via Contiguous Allocator

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Solution Overview

Problem

Existing simulation programs for industrial systems using heterogeneous processors face complexity and inefficiency due to the need for explicit management of dynamic memory allocations across different processor types, leading to increased development time and potential errors.

Innovation Solution

A method and system utilizing a contiguous memory allocator to manage dynamic memory regions and memory pointers, enabling implicit sharing of simulation instances between heterogeneous processors, particularly CPUs and GPUs, by using a special memory pointer to track relative distances for dynamic allocations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If explicit memory management is used to share instances between heterogeneous processors, then memory sharing capability is achieved, but device complexity and development time increase significantly

Engineering Contradiction:
Improvememory sharing capabilityVSAvoidexplicit management complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces a buffer memory as an intermediary between CPU and GPU. The CPU writes simulation instance data to the buffer memory, and the GPU reads from it, eliminating the need for explicit memory management code. This mediator approach allows heterogeneous processors to share data without direct complex interactions.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent extracts the memory management functionality from the simulation code by using a separate buffer memory mechanism. The simulation programs don't need to contain explicit memory allocation, copying, or tracking code - these operations are handled externally by the buffer memory system.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If dynamic allocations are tracked explicitly for each processor type, then memory accuracy is maintained, but ease of operation and development efficiency decrease

Engineering Contradiction:
Improvememory accuracyVSAvoiddevelopment efficiency
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The buffer memory performs self-service by automatically managing its own content. It receives data from CPU and makes it available to GPU without requiring external tracking or management. The system serves itself by using the buffer's natural read/write capabilities to handle memory sharing.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The buffer memory serves multiple functions: it acts as CPU output memory, GPU input memory, and a synchronization mechanism all in one. This universal component handles various memory management tasks that would otherwise require separate explicit operations for each processor type.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If simulation code is compiled separately for CPU and GPU, then processor-specific optimization is achieved, but productivity and development time are reduced

Engineering Contradiction:
Improvedevelopment timeVSAvoidprocessor compatibility
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The simulation code is written once in a universal manner that can run on both CPU and GPU without separate compilation or modification. The buffer memory abstraction layer provides the necessary adaptability, allowing the same simulation program to execute efficiently on heterogeneous processors while maintaining processor-specific optimizations through the unified interface.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP4179448B1Computing platform for simulating an industrial system and method of managing the simulation
Publication Date: 2026.03.18 SIEMENS IND SOFTWARE NV
  • EP4179448B1 patent drawingFigure 1
  • EP4179448B1 patent drawingFigure 2
  • EP4179448B1 patent drawingFigure 3

AI summary

Computing Platform for Simulating an Industrial System and Method of Managing the Simulation are disclosed. The method comprising generating at least one instance of a simulation model of the industrial system, the method characterized by: generating the instance (342) using a contiguous memory allocator for a dynamic memory region (252) associated with a first processor (242) of the heterogenous processors (242, 262); enabling a second processor (262) to use the instance (342) in the dynamic memory region (252) based on a memory pointer associated with the address of a copy (362) of the instance; and simulating the industrial system by the second processor (262) by accessing the instance-copy (362).