Heterogeneous Memory Controller Using Border Index Values

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Solution Overview

Problem

Existing data processing systems struggle to efficiently manage memory operations between high capacity DIMMs and high bandwidth memory (HBM) devices, often leading to suboptimal performance due to mismatched bandwidth and capacity requirements.

Innovation Solution

A data processing system and method that utilize a heterogeneous memory system comprising a memory module and HBM, where the HBM includes a processing-in-memory (PIM) circuit. The system employs a memory controller to detect data arrays based on border index values, determining whether the data is stored in the memory module or HBM, and generates appropriate command sets to optimize memory operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If high capacity DIMM is used for memory operations, then memory capacity is improved, but bandwidth is reduced

Engineering Contradiction:
Improvememory capacityVSAvoidbandwidth
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The patent segments the memory system into two distinct parts: DIMM for high capacity storage and HBM for high bandwidth operations. The memory controller divides memory address spaces into first and second address spaces, directing different data arrays to different memory types based on operational requirements, thus resolving the contradiction between capacity and bandwidth

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically selects which memory type to use based on real-time operational needs. The memory controller determines whether to access DIMM or HBM by evaluating data array characteristics and operational requirements, allowing the system to adapt between capacity-oriented and bandwidth-oriented modes as needed

Inventive Principle:
Principle #15Dynamics

2Speed

If multiple DIMMs are used to support high bandwidth operations, then bandwidth is improved, but memory capacity becomes excessive

Engineering Contradiction:
ImprovebandwidthVSAvoidmemory capacity
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The patent segments the memory system into two distinct parts: DIMM for high capacity storage and HBM for high bandwidth operations. The memory controller divides memory address spaces into first and second address spaces, directing different data arrays to different memory types based on operational requirements, thus resolving the contradiction between capacity and bandwidth

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The memory controller acts as an intermediary that intelligently routes memory requests to the appropriate memory type. By implementing border index values and address space segmentation, the controller ensures that high bandwidth operations utilize HBM without requiring excessive DIMM capacity, optimizing resource utilization

Inventive Principle:
Principle #24Intermediary (Mediator)

3Quantity of substance

If multiple HBM components are used to support high capacity operations, then memory capacity is improved, but bandwidth becomes excessive and execution speed is reduced

Engineering Contradiction:
Improvememory capacityVSAvoidexecution speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The patent segments the memory system into two distinct parts: DIMM for high capacity storage and HBM for high bandwidth operations. The memory controller divides memory address spaces into first and second address spaces, directing different data arrays to different memory types based on operational requirements, thus resolving the contradiction between capacity and bandwidth

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically selects which memory type to use based on real-time operational needs. The memory controller determines whether to access DIMM or HBM by evaluating data array characteristics and operational requirements, allowing the system to adapt between capacity-oriented and bandwidth-oriented modes as needed

Inventive Principle:
Principle #15Dynamics

4Adaptability or versatility

If heterogeneous memory system is implemented, then both capacity and bandwidth are supported, but system complexity increases

Engineering Contradiction:
Improvememory system adaptabilityVSAvoidsystem complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The memory controller is designed with multi-functionality to manage both DIMM and HBM through unified interfaces. By implementing border index values and address space segmentation mechanisms within the controller, the system achieves heterogeneous memory management without requiring separate control logic for each memory type, thus reducing overall system complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The memory controller acts as an intermediary that intelligently routes memory requests to the appropriate memory type. By implementing border index values and address space segmentation, the controller ensures that high bandwidth operations utilize HBM without requiring excessive DIMM capacity, optimizing resource utilization

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12287984B2Data processing system and method for accessing heterogeneous memory system including processing unit
Publication Date: 2025.04.29 SAMSUNG ELECTRONICS CO LTD
  • US12287984B2 patent drawing
  • US12287984B2 patent drawing
  • US12287984B2 patent drawing

AI summary

A data processing system and method for accessing a heterogeneous memory system including a processing unit are provided. The heterogeneous memory system includes a memory module and high bandwidth memory (HBM) including a processing-in-memory (PIM) circuit combined with a memory controller. The memory controller is configured to detect a data array required for an arithmetic operation from a memory module or the HBM by using a border index value when the arithmetic operation is performed by the PIM circuit of the HBM and generate a memory module command set and an HBM command set using physical address spaces respectively designated in the memory module and the HBM.