Heterogeneous Memory System with Integrated Cache for Mobile Devices
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional computer systems face challenges in increasing memory capacity without adversely affecting the form factor, as DRAM-based main memory is volatile, power-consuming, and limited in density, leading to the need for multiple DIMMs which increase cost and volume, making it unsuitable for mobile devices.
Innovation Solution
A memory system comprising plural heterogeneous memories with different latencies, where a high-capacity memory with lower latency operates as a cache for a high-speed memory, and a processor accesses these memories through a memory controller, utilizing a dual bus system for efficient data transfer and caching, allowing the system to operate in high-speed and high-capacity modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If DRAM-based main memory is used to increase storage capacity, then memory capacity is improved, but volume and cost increase due to multiple DIMMs
Solution Approach 1:
The patent combines high-capacity memory and high-speed memory into a single integrated memory device, merging two previously separate components (memory array and cache) to achieve high capacity without proportionally increasing volume
Solution Approach 2:
The high-speed memory is nested within the high-capacity memory device as an integrated cache, with the cache controller embedded in the same package, creating a hierarchical structure that maximizes space utilization
2Quantity of substance
If DRAM-based main memory is used to increase storage capacity, then memory capacity is improved, but power consumption increases due to constant capacitor recharging
Solution Approach 1:
The patent applies different memory technologies with different power characteristics to different parts of the system: high-capacity memory for bulk storage and high-speed memory (cache) for frequently accessed data, optimizing power consumption based on local access patterns
Solution Approach 2:
The cache memory periodically refreshes only the data that is frequently accessed, rather than continuously refreshing all memory data, reducing overall power consumption while maintaining data integrity
3Quantity of substance
If multiple DIMMs are used to increase memory capacity, then memory capacity is improved, but device complexity increases
Solution Approach 1:
The integrated memory device performs multiple functions: it provides high-capacity storage and high-speed caching operations within a single device, eliminating the need for separate memory modules and reducing system complexity
4Productivity
If high-capacity memory is used for caching, then data access speed is improved, but latency increases compared to high-speed memory
Solution Approach 1:
The high-speed cache memory pre-loads and stores frequently accessed data before it is needed by the processor, eliminating the latency that would occur if data had to be fetched from high-capacity memory at the moment of access
Solution Approach 2:
The memory system dynamically switches between high-capacity memory and high-speed cache based on access patterns, providing fast access for frequent operations while maintaining adequate capacity for less frequent access
Data Source
AI summary
A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.