Heterogeneous Memory System with DRAM Cache and NVRAM

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Solution Overview

Problem

Conventional computer systems face limitations in main memory capacity due to the high cost and volume of DRAM packages, which adversely affect the form factor, especially in mobile devices, and require multiple DIMMs to increase storage capacity, leading to power consumption issues with volatile DRAM-based memories.

Innovation Solution

A memory system comprising a first volatile memory device (DRAM) and a second non-volatile memory device (NVRAM) with separate controllers, where the NVRAM acts as system memory, buffering write data and updating memory cores independently, and the DRAM serves as high-capacity cache memories to mask latency limitations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If DRAM packages are used to increase memory capacity, then storage capacity is improved, but system volume and cost increase

Engineering Contradiction:
Improvememory capacityVSAvoidsystem volume
Core Design Contradiction:
Quantity of substanceVSVolume of moving object

Solution Approach 1:

The memory system is segmented into two distinct memory devices with different characteristics: a first memory device (DRAM) for high-speed cache operations and a second memory device (NVRAM) for persistent system memory. This segmentation allows each memory type to operate in its optimal performance zone while collectively providing high capacity without proportionally increasing system volume

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a single-dimension memory hierarchy (only volatile DRAM) to a multi-dimensional memory architecture that incorporates both volatile and non-volatile memory dimensions. This allows the system to achieve high capacity in the non-volatile dimension while maintaining fast access in the volatile dimension, effectively expanding memory capacity without linearly increasing physical volume

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If multiple DIMMs are used to increase storage capacity, then memory capacity is improved, but power consumption increases

Engineering Contradiction:
Improvestorage capacityVSAvoidpower consumption
Core Design Contradiction:
Quantity of substanceVSUse of energy by moving object

Solution Approach 1:

The memory system segments storage functions between two memory devices: the first memory (DRAM) handles frequently accessed data requiring fast access, while the second memory (NVRAM) stores less frequently accessed data requiring persistence. This segmentation allows the system to reduce overall power consumption by keeping only essential data in power-hungry DRAM while utilizing power-efficient NVRAM for bulk storage

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The memory management logic implements periodic data migration and caching strategies, moving data between the first and second memory devices based on access patterns. This periodic action optimizes power consumption by keeping actively used data in DRAM while migrating inactive data to NVRAM, reducing the burden on power-consuming DRAM capacitors

Inventive Principle:
Principle #19Periodic action

3Speed

If DRAM-based memory is used for system memory, then access speed is improved, but data persistence is lost upon power removal

Engineering Contradiction:
Improveaccess speedVSAvoiddata persistence
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The first memory device (DRAM) acts as an intermediary cache between the processor and the second memory device (NVRAM). This intermediary provides fast access to frequently used data while the NVRAM ensures data persistence. The memory management logic coordinates data transfers between these two layers, allowing the system to achieve both fast access speeds and data persistence

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system performs preliminary data copying from the second memory (NVRAM) to the first memory (DRAM) cache before actual processing occurs. This preliminary action ensures that data needed for immediate processing is already in the fast DRAM cache, while the persistent copy remains safely stored in NVRAM, providing both speed and reliability

Inventive Principle:
Principle #10Preliminary action

4Quantity of substance

If heterogeneous memories with different latencies are used, then storage capacity and power efficiency are improved, but system complexity increases

Engineering Contradiction:
Improvestorage capacityVSAvoidsystem complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The memory management logic in both memory devices is designed with multi-functionality to handle various operations: caching, buffering, data migration, and coordinated access. This universality allows the heterogeneous memory system to operate as a unified whole, managing complexity internally while presenting a simplified interface to the processor and external systems

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10191664B2Memory system
Publication Date: 2019.01.29 SK HYNIX INC
  • US10191664B2 patent drawing
  • US10191664B2 patent drawing
  • US10191664B2 patent drawing

AI summary

A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.