Heterogeneous Memory Module Internal Bus Swap Manager
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Solution Overview
Problem
There is a need for an efficient method to perform data swap operations between volatile and nonvolatile memory modules in semiconductor systems without occupying external resources like the system bus, to manage memory efficiently and reduce page faults.
Innovation Solution
A semiconductor system with a heterogeneous memory module that includes a volatile memory module, a nonvolatile memory module, an internal bus separate from the system bus, and a swap manager that controls data transfer between these modules using the internal bus, allowing for autonomous swap operations without relying on external resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data swap operations between volatile and nonvolatile memory modules are performed using the system bus, then data transfer can be achieved, but external resources (system bus and processing components) are occupied, increasing system load and reducing processing efficiency
Solution Approach 1:
The patent segments the data transfer path by introducing a separate internal bus within the heterogeneous memory module, independent from the external system bus. This allows data swap operations between volatile and nonvolatile memory modules to occur through a dedicated internal pathway, preventing occupation of external system resources while maintaining efficient data transfer capability.
Solution Approach 2:
The patent introduces an internal bus as an intermediary component specifically for data swap operations between memory modules. This internal bus acts as a mediator that handles data transfer tasks internally within the heterogeneous memory module, eliminating the need to use the external system bus for these operations and thereby reducing system resource occupation.
2Productivity
If data swap operations are performed through external system bus, then data can be transferred between memory modules, but the time required for data processing operations increases due to external resource occupation
Solution Approach 1:
By segmenting the data transfer pathway into an internal bus separate from the system bus, the patent enables parallel operation where data swap between memory modules occurs through the internal bus without interfering with or being interfered by external system operations. This segmentation reduces data transfer time by eliminating external resource contention.
Solution Approach 2:
The patent establishes the internal bus infrastructure in advance, preparing a dedicated data transfer pathway before swap operations are needed. This preliminary setup ensures that when data swap operations occur, they can proceed immediately through the pre-configured internal bus without needing to access external system resources, thereby reducing processing time.
Data Source
AI summary
A semiconductor system includes a CPU connected to a heterogeneous memory module via a system bus. The heterogeneous memory module includes; a volatile memory module, a nonvolatile memory module, an internal bus separate from the system bus and connecting the volatile memory module and the nonvolatile memory module, and a swap manager configured to control execution of a swap operation transferring target data between the volatile memory module and nonvolatile memory module using the internal bus and without using of the system bus.