Heterogeneous Multi-Core Architecture for AI Workloads

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Solution Overview

Problem

Existing solutions for designing Field-Programmable Gate Arrays (FPGAs) and System-on-Chips (SoCs) face challenges in meeting the performance, power, and cost requirements of advanced applications like AI, 5G, streaming, and computer graphics.

Innovation Solution

A heterogeneous multi-core architecture system is introduced, comprising processing units, accelerator units, and a function arbiter, which allows for seamless integration of processing cores, memory subsystems, and custom accelerators into a unified architecture, enabling high-efficiency automated hardware/software co-design.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If GPUs are used to meet performance requirements of advanced applications, then performance is improved, but power consumption increases excessively

Engineering Contradiction:

ImproveperformanceVSAvoidpower consumption

Core Design Contradiction:

SpeedVSUse of energy by moving object

Solution Approach 1:

The system segments computational tasks by separating them into different processing domains: general-purpose CPU cores handle control and I/O operations, while dedicated hardware accelerators handle compute-intensive workloads. This segmentation allows each component to be optimized for its specific function, reducing overall power consumption compared to using a single GPU for all tasks.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different processing units are assigned different qualities and characteristics tailored to their specific functions. The CPU cores are optimized for low-power control operations, while the accelerators are optimized for high-performance compute tasks. This local optimization ensures that each unit consumes power efficiently relative to its workload requirements.

Inventive Principle:

Principle #3Local quality

2Use of energy by moving object

If CPUs are used for processing, then power consumption is reduced, but performance requirements of advanced applications cannot be met

Engineering Contradiction:

Improvepower consumptionVSAvoidperformance

Core Design Contradiction:

Use of energy by moving objectVSSpeed

Solution Approach 1:

The system merges CPU general-purpose processing with dedicated hardware accelerators into a unified heterogeneous architecture. This combination allows the system to leverage the low-power efficiency of CPUs for control tasks while utilizing the high-performance capabilities of accelerators for compute-intensive operations, achieving both low power consumption and high performance.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The processing units are designed with multi-functionality, where CPU cores can execute general-purpose software while hardware accelerators provide specialized computational capabilities. This universal design allows the system to adapt to different workload types, maintaining both power efficiency and performance flexibility.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Speed

If custom hardware is designed to address performance objectives, then performance is improved, but design complexity increases

Engineering Contradiction:

ImproveperformanceVSAvoiddesign complexity

Core Design Contradiction:

SpeedVSDevice complexity

Solution Approach 1:

A software framework acts as an intermediary layer between high-level programming languages and the underlying heterogeneous hardware architecture. This framework automatically handles the complexity of resource allocation, task scheduling, and inter-component communication, allowing developers to write code in standard languages while the framework manages the intricate hardware details.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

Manual hardware design and configuration processes are replaced with automated software-based synthesis and code generation tools. The system uses software to automatically generate, optimize, and manage hardware resources, substituting complex mechanical design processes with more manageable software-based approaches.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

4Loss of time

If automated system design is implemented, then development time is reduced, but manufacturing precision requirements increase

Engineering Contradiction:

Improvedevelopment timeVSAvoidfabrication precision

Core Design Contradiction:

Loss of timeVSManufacturing precision

Solution Approach 1:

The system performs preliminary design decisions and resource allocation in the software phase before physical fabrication occurs. Configuration parameters, resource assignments, and architectural decisions are predetermined through automated synthesis, allowing for flexible adjustments during manufacturing without requiring high precision in the fabrication process itself.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS20250190262A1Heterogeneous functional processing architectures and methods to design and fabricate the same

Publication Date: 2025.06.12 VISHARE TECH LTD

AI summary

The present disclosure relates to heterogeneous architecture systems and methods to design and fabricate the same. In one example, the heterogeneous architecture system includes at least one processing unit, a plurality of accelerator units, a memory subsystem connected to the at least one processing unit and the plurality of accelerator units, and at least one function arbiter connected to the at least one processing unit and the plurality of accelerator units. Other embodiments are described herein. In certain embodiments, the heterogeneous architecture system integrates various types of processing components, each optimized for specific tasks, allowing for a more efficient execution of diverse workloads.