Heterogeneous integration semiconductor package structure
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor package structures face high internal thermal resistance and inadequate heat dissipation due to the active surface of chips facing downwards and encapsulants separating heat dissipation modules from the chip's back surface, limiting heat transfer and increasing chip temperatures.
Innovation Solution
A heterogeneous integration semiconductor package structure with a two-phase flow heat dissipation device and redistribution structure layers, where chips are connected to a heat dissipation assembly with their active surfaces facing upwards, and conductive vias and heat conduction blocks enhance heat transfer, reducing internal thermal resistance and improving heat dissipation efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If chips are assembled with active surface facing downwards on a redistribution structure layer, then electrical connection is achieved, but internal thermal resistance increases and heat dissipation ability deteriorates
Solution Approach 1:
The patent inverts the conventional chip assembly orientation by placing the active surface of the chip facing upwards instead of downwards. This allows the back surface to directly contact the heat dissipation assembly, fundamentally changing the thermal conduction path and enabling efficient heat removal while maintaining electrical connectivity through the substrate.
Solution Approach 2:
The patent extracts the encapsulant material from between the chip back surface and the heat dissipation assembly, removing the thermal barrier that previously isolated these components. This extraction creates a direct thermal contact path, allowing heat to flow efficiently from the chip to the heat dissipation structure without resistance from encapsulant material.
2Temperature
If an external heat dissipation module is used with encapsulant separation, then heat dissipation function is provided, but heat transfer uniformity deteriorates and heat dissipation performance is limited
Solution Approach 1:
The patent merges the heat dissipation assembly directly with the substrate structure, integrating thermal management functions into the package substrate itself. This combination eliminates the need for separate encapsulant layers and external heat dissipation modules, creating a unified structure that ensures uniform heat transfer across the entire chip area.
Solution Approach 2:
The patent transitions from a conventional layered structure to a three-dimensional integrated structure where heat dissipation channels are embedded within the substrate. This dimensional change allows heat to be dissipated through multiple pathways simultaneously, improving heat transfer uniformity and overall dissipation efficiency.
3Reliability
If encapsulant is used to seal and cover the chip, then protection is provided, but thermal conduction ability deteriorates and heat dissipation is limited
Solution Approach 1:
The patent applies different material properties to different regions of the package structure. The encapsulant is selectively applied only where mechanical protection is needed, while the regions requiring thermal conduction use materials with high thermal conductivity. This local differentiation allows simultaneous achievement of protection and heat dissipation.
Solution Approach 2:
The patent employs composite material structures that combine materials with complementary properties - structural materials for protection and thermally conductive materials for heat dissipation. This composite approach allows the package to simultaneously provide mechanical protection and efficient thermal management.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces internal thermal resistance and enhances heat dissipation performance by utilizing an efficient temperature uniformity thermal diffusion mechanism, improving the heat dissipation efficiency of external heat dissipation modules and maintaining chip temperatures within safe limits.
Implementation Method 1
The heat dissipation assembly has a connection surface and includes a two-phase flow heat dissipation device and a first redistribution structure layer embedded in the connection surface
Implementation Method 2
conductive vias and heat conduction blocks enhance heat transfer, reducing internal thermal resistance and improving heat dissipation efficiency
Data Source
AI summary
A heterogeneous integration semiconductor package structure including a heat dissipation assembly, multiple chips, a package assembly, multiple connectors and a circuit substrate is provided. The heat dissipation assembly has a connection surface and includes a two-phase flow heat dissipation device and a first redistribution structure layer embedded in the connection surface. The chips are disposed on the connection surface of the heat dissipation assembly and electrically connected to the first redistribution structure layer. The package assembly surrounds the chips and includes a second redistribution structure layer disposed on a lower surface and multiple conductive vias electrically connected to the first redistribution structure layer and the second redistribution structure layer. The connectors are disposed on the package assembly and electrically connected to the second redistribution structure layer. The circuit substrate is electrically connected to the second redistribution structure layer of the package assembly through the connectors.