Heterogeneous Processing System for Federated Learning

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Solution Overview

Problem

Current technologies face challenges in handling complex computations such as cyclic and recursive computations with large data volumes in federated learning and privacy-preserving computation, leading to inefficiencies in storage and computing performance.

Innovation Solution

A heterogeneous processing system is introduced, comprising a serial subsystem and a parallel subsystem that manage processing tasks and data interaction efficiently, utilizing a task status register to coordinate operations and optimize memory utilization, allowing for parallel computing and efficient data flow management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a heterogeneous processing system with both serial and parallel subsystems is used, then computing efficiency and memory utilization are improved, but device complexity increases

Engineering Contradiction:
Improvecomputing efficiencyVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The processing system is segmented into two distinct subsystems: a serial subsystem for control and coordination functions, and a parallel subsystem for high-performance computational tasks. This segmentation allows each subsystem to be optimized for its specific function, improving overall computing efficiency while managing complexity through functional separation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A task status register acts as an intermediary mechanism between the serial and parallel subsystems. This intermediary enables efficient coordination and data exchange without requiring complex communication protocols, thus improving productivity while minimizing the increase in device complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If parallel computing is used for federated learning tasks, then processing speed is improved, but memory resource requirements increase

Engineering Contradiction:
Improveprocessing speedVSAvoidmemory resource
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

Memory resources are segmented and allocated differently across the serial and parallel subsystems. The parallel subsystem receives only the necessary data subsets for its computational tasks, while the serial subsystem maintains control structures and coordination data. This segmentation reduces the total memory footprint required for parallel processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The parallel subsystem performs computations on partial data sets (subsets of the federated learning data) rather than processing complete data sets. This partial action approach enables parallel processing speed improvements while significantly reducing the memory resources required, as each parallel unit handles only its assigned portion of the computation.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11676074B2Heterogeneous processing system for federated learning and privacy-preserving computation
Publication Date: 2023.06.13 CLUSTAR TECH LO LTD
  • US11676074B2 patent drawing
  • US11676074B2 patent drawing
  • US11676074B2 patent drawing

AI summary

A heterogeneous processing system for federated learning and privacy-preserving computation, including: a serial subsystem configured for distributing processing tasks and configuration information of processing tasks, the processing task indicating performing an operation corresponding to computing mode on one or more operands; and a parallel subsystem configured for, based on the configuration information, selectively obtaining at least one operand of the one or more operands from an intermediate result section on the parallel subsystem while obtaining remaining operand(s) of the one or more operands with respect to the at least one operand from the serial subsystem, and performing the operation on the operands obtained based on the configuration information.