Heterogeneous Processor Cluster for Hardware Emulation
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Solution Overview
Problem
Conventional hardware emulators require substantial memory and energy due to the use of identical processors, which becomes inefficient with the increasing complexity of integrated circuits.
Innovation Solution
A heterogeneous processor-based emulation system where each processor in a cluster performs a unique function, utilizing a data fetch processor, a data store processor, and an optional computation processor, with an intracluster crossbar for communication, reducing memory requirements and energy consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional identical processors are used in hardware emulators, then each processor can perform any function, but memory requirements increase substantially with the number of processors
Solution Approach 1:
The patent divides the processor population into specialized segments: data fetch processors (DFPs) that retrieve and evaluate data, and data store processors (DSPs) that store results. This segmentation allows different processor types to have different memory requirements, with only DFPs needing full instruction memory access while DSPs have reduced memory needs.
Solution Approach 2:
Different processor types within the cluster have different local qualities - DFPs are equipped with complete instruction memory for full functionality, while DSPs have simplified memory structures optimized for their storage function. This local differentiation reduces overall memory requirements while maintaining system versatility.
2Productivity
If more processors are added to increase emulation speed, then emulation efficiency improves, but memory requirements increase proportionally
Solution Approach 1:
By segmenting processors into DFPs and DSPs, the system can add more processors to increase productivity without proportionally increasing memory. DSPs can be added in larger numbers since they have reduced memory requirements, thereby boosting emulation speed while controlling memory growth.
Solution Approach 2:
The heterogeneous processor cluster provides multi-functionality where DFPs handle data retrieval and evaluation, DSPs handle data storage, and the combination enables efficient emulation of complex circuits. This functional diversity allows the system to achieve high productivity with optimized memory usage.
3Device complexity
If identical processors are used, then system design is simplified, but energy consumption increases due to redundant read and write accesses
Solution Approach 1:
Segmenting processors into specialized DFPs and DSPs eliminates redundant operations. DFPs perform evaluation and write results, while DSPs perform storage. This division removes the need for each processor to perform both read and write operations, reducing energy consumption despite increased architectural complexity.
Solution Approach 2:
The patent creates specialized copies of processors optimized for specific functions rather than using general-purpose identical processors. DFPs are copied for data fetch and evaluation, DSPs are copied for data storage. This functional copying reduces redundant energy-consuming operations while accepting some architectural complexity.
Data Source
AI summary
A hardware emulation system having a heterogeneous cluster of processors is described. The apparatus for emulating a hardware design comprises a plurality of processors, where each processor performs a different function during an emulation cycle. The method performed by the apparatus comprises using a data fetch processor to retrieve data from a data array, evaluating the retrieved data using the data fetch processor to produce an output bit, supplying the output bit to an intracluster crossbar and using a data store processor to store the output bit in the data array.