Heterogeneous Semiconductor Integration with Reinforcing Chips
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Solution Overview
Problem
Current semiconductor integration technologies, such as SoC and SiP, face limitations in combining heterogeneous elements like GaAs and Si devices due to different fabrication processes and high development costs, and struggle with mechanical strength, especially when integrating large or numerous heterogeneous chips.
Innovation Solution
A semiconductor device configuration that includes a first semiconductor unit with organic resin and a wiring layer connecting multiple semiconductor chips, a second semiconductor unit with a larger active element mounted on top for mechanical reinforcement, and optionally additional units for further reinforcement, enhancing mechanical strength and integration density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If heterogeneous chips are embedded in epoxy resin to form pseudo-SoC, then integration density is improved, but mechanical strength deteriorates
Solution Approach 1:
The patent uses a composite structure combining epoxy resin with reinforcing materials (glass fibers, metal plates, or additional semiconductor chips) to create a hybrid material system that maintains the embedding functionality while significantly enhancing mechanical strength and rigidity
Solution Approach 2:
The patent embeds additional reinforcing chips or structural elements within the epoxy resin matrix, creating a nested configuration where smaller structural components are embedded within the larger resin body to provide internal reinforcement without increasing external dimensions
2Quantity of substance
If the number of heterogeneous chips to be arranged is large, then integration density is improved, but mechanical strength becomes more difficult to improve
Solution Approach 1:
The patent employs reinforcing chips that serve dual functions: they act as structural reinforcement elements to enhance mechanical strength, and simultaneously function as active semiconductor components contributing to the device's operational functionality, thereby addressing both structural and functional requirements with a single element
3Area of stationary object
If device size is reduced, then integration density is improved, but mechanical strength deteriorates
Solution Approach 1:
The patent applies reinforcing materials selectively at specific locations within the epoxy resin where mechanical strength is most needed, such as around chip mounting areas or at stress concentration points, rather than uniformly throughout the entire structure, thereby enhancing strength without proportionally increasing overall device size
Data Source
AI summary
A semiconductor device includes a first semiconductor unit including a plurality of first semiconductor chips, an organic resin provided between the first semiconductor chips, a wiring layer provided above the first semiconductor chips to electrically connect the first semiconductor chips to each other, and a plurality of connecting terminals provided on an upper portion of the wiring layer and a second semiconductor unit fixed to a wiring layer side of the first semiconductor unit, the second semiconductor unit fixed to a region sandwiched between the connecting terminals, the second semiconductor unit having a second semiconductor chip, the second semiconductor unit electrically connected to the first semiconductor unit.