Heterogeneous Task Scheduling via Hardware Command Processor

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Solution Overview

Problem

Conventional computing systems face challenges in task scheduling between CPUs and GPUs, including separate memory systems, inefficient scheduling, programming models, and power consumption, which hinder the fluid use of combined CPU and GPU resources for general computation.

Innovation Solution

A heterogeneous enqueuing and dequeuing mechanism is introduced, allowing GPUs to schedule tasks independently using a software-based enqueuing module and hardware-based command processor, enabling unified task management across CPUs and GPUs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the CPU schedules tasks for the GPU by reading from memory storage module, then task scheduling can be performed, but CPU resources are diverted and power consumption increases

Engineering Contradiction:
Improvetask scheduling efficiencyVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The GPU is equipped with a hardware command processor that can autonomously dequeue and process tasks from the memory storage module without requiring CPU intervention. This self-service mechanism allows the GPU to manage its own task queue, eliminating the need for continuous CPU polling and reducing overall system power consumption while maintaining high task scheduling efficiency

Inventive Principle:
Principle #25Self-service

2Reliability

If separate memory systems are used for CPU and GPU, then each processor has dedicated memory access, but memory latency increases and power consumption rises

Engineering Contradiction:
Improvememory access reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements a unified memory storage module that is accessible by both the CPU and GPU, eliminating the need for separate memory systems. This shared memory architecture reduces memory latency by allowing direct access to the same memory space, reduces power consumption by eliminating redundant memory controllers, and maintains data consistency through a single memory hierarchy

Inventive Principle:
Principle #5Merging (Combining)

3Ease of operation

If the GPU cannot schedule its own tasks and relies on CPU scheduling, then centralized control is maintained, but GPU resource utilization efficiency decreases

Engineering Contradiction:
Improvecentralized controlVSAvoidGPU resource utilization
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The scheduling function is segmented into two parts: the CPU handles high-level task submission and queue management through a software enqueuing module, while the GPU's hardware command processor handles low-level task dequeuing and execution. This segmentation allows centralized control to be maintained at the system level while enabling the GPU to autonomously manage its own task execution, thereby improving resource utilization efficiency

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10146575B2Heterogeneous enqueuing and dequeuing mechanism for task scheduling
Publication Date: 2018.12.04 ADVANCED MICRO DEVICES INC
  • US10146575B2 patent drawing
  • US10146575B2 patent drawing
  • US10146575B2 patent drawing

AI summary

Methods, systems and computer-readable mediums for task scheduling on an accelerated processing device (APD) are provided. In an embodiment, a method comprises: enqueuing one or more tasks in a memory storage module based on the APD; using a software-based enqueuing module; and dequeuing the one or more tasks from the memory storage module using a hardware-based command processor, wherein the command processor forwards the one or more tasks to the shader cote.